Inventor profile of:

Jin LIU

City:

Milpitas, California

Country:

United States

Published Applications:

16

Last publication date:

2018-09-27

Top Assignees for applications by Jin LIU

The entities that hold a legal rights for patent applications filed by inventor LIU Jin:

Recent patent applications by LIU Jin

Jin LIU from Milpitas, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2018-09-27
US20180277567A1
Electricity

Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same

#2 | 2018-07-26
US20180211970A1
Electricity

Three-dimensional memory device with self-aligned drain side select gate electrodes and method of making thereof

#3 | 2018-05-17
US20180138193A1
Electricity

Three-dimensional memory device having a multilevel drain select gate electrode and method of making thereof

#4 | 2018-05-17
US20180138189A1
Electricity

Three-dimensional memory device with self-aligned drain side select gate electrodes and method of making thereof

#5 | 2017-09-28
US20170278571A1
Physics

Three dimensional NAND memory device with common bit line for multiple NAND strings in each memory block

#6 | 2017-08-17
US20170236835A1
Electricity

Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same

#7 | 2017-06-22
US20170179154A1
Electricity

Through-memory-level via structures for a three-dimensional memory device

#8 | 2017-06-22
US20170179151A1
Electricity

Through-memory-level via structures for a three-dimensional memory device

#9 | 2017-06-22
US20170179026A1
Electricity

Through-memory-level via structures for a three-dimensional memory device

#10 | 2017-05-25
US20170148811A1
Electricity

Three-dimensional NAND device containing support pedestal structures for a buried source line and method of making the same

#11 | 2017-05-25
US20170148810A1
Electricity

Three-dimensional NAND device containing support pedestal structures for a buried source line and method of making the same

#12 | 2017-05-25
US20170148800A1
Electricity

Three dimensional NAND device containing dielectric pillars for a buried source line and method of making thereof

#13 | 2017-02-14
US14883966
Electricity

Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same

#14 | 2016-11-03
US20160322381A1
Electricity

Multilevel memory stack structure employing support pillar structures

#15 | 2016-07-14
US20160204117A1
Electricity

Vertical NAND and method of making thereof using sequential stack etching and self-aligned landing pad

#16 | 2016-03-24
US20160086972A1
Electricity

Monolithic three-dimensional NAND strings and methods of fabrication thereof

InventorID:

1484599 ⎘