Inventor profile of:

Ali Mohammadzadeh

City:

Mountain View, California

Country:

United States

Published Applications:

32

Last publication date:

2026-01-29

Top Assignees for applications by Ali Mohammadzadeh

The entities that hold a legal rights for patent applications filed by inventor Mohammadzadeh Ali:

Recent patent applications by Mohammadzadeh Ali

Ali Mohammadzadeh from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-01-29
US20260030157A1
Physics

DUAL DATA CHANNEL PEAK POWER MANAGEMENT

#2 | 2026-01-15
US20260016878A1
Physics

STAGGERED EXECUTION FOR PEAK POWER MANAGEMENT

#3 | 2025-07-03
US20250217035A1
Physics

INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE

#4 | 2024-12-26
US20240428872A1
Physics

CONTINUOUS MEMORY PROGRAMMING OPERATIONS

#5 | 2024-08-15
US20240272812A1
Physics

Prioritized power budget arbitration for multiple concurrent memory access operations

#6 | 2024-07-18
US20240241643A1
Physics

CURRENT MANAGEMENT DURING DATA BURST OPERATIONS IN A MULTI-DIE MEMORY DEVICE

#7 | 2024-05-02
US20240143501A1
Physics

DUAL DATA CHANNEL PEAK POWER MANAGEMENT

#8 | 2024-02-22
US20240061592A1
Physics

MULTIPLE CURRENT QUANTIZATION VALUES FOR PEAK POWER MANAGEMENT

#9 | 2023-03-16
US20230084630A1
Physics

Prioritized power budget arbitration for multiple concurrent memory access operations

#10 | 2023-03-02
US20230060312A1
Physics

Continuous memory programming operations

#11 | 2023-02-23
US20230059543A1
Physics

Independent plane architecture in a memory device

#12 | 2023-02-09
US20230043418A1
Physics

Memory status command aggregation

#13 | 2022-03-17
US20220083241A1
Physics

Power budget arbitration for multiple concurrent access operations in a memory device

#14 | 2022-01-13
US20220011959A1
Physics

Checking status of multiple memory dies in a memory sub-system

#15 | 2021-07-29
US20210232508A1
Physics

LAST WRITTEN PAGE SEARCHING

#16 | 2021-06-17
US20210181955A1
Physics

Apparatuses and methods to control memory operations on buffers

#17 | 2021-04-08
US20210103389A1
Physics

Partially written block treatment

#18 | 2021-02-25
US20210057031A1
Physics

Apparatuses and methods for automated dynamic word line start voltage

#19 | 2020-12-17
US20200393985A1
Physics

Data programming

#20 | 2020-05-28
US20200167229A1
Physics

Partially written superblock treatment

#21 | 2019-11-21
US20190355422A1
Physics

Apparatuses and methods for automated dynamic word line start voltage

#22 | 2019-10-31
US20190332284A1
Physics

Apparatuses and methods to control memory operations on buffers

#23 | 2019-09-19
US20190286328A1
Physics

Partially written block treatment

#24 | 2019-05-23
US20190155744A1
Physics

Last written page searching

#25 | 2019-02-28
US20190065095A1
Physics

Data programming

#26 | 2019-02-21
US20190056989A1
Physics

Partially written superblock treatment

#27 | 2018-12-06
US20180349029A1
Physics

Apparatuses and methods to control memory operations on buffers

#28 | 2018-11-06
US15621448
Physics

Data programming

#29 | 2018-10-18
US20180301193A1
Physics

Apparatuses and methods for automated dynamic word line start voltage

#30 | 2018-07-26
US20180210653A1
Physics

Partially written block treatment

#31 | 2017-03-09
US20170069385A1
Physics

NAND memory addressing

#32 | 2016-03-31
US20160093379A1
Physics

NAND memory addressing

InventorID:

1490831 ⎘