Rolf Stephan

Methods of reducing material loss in isolation structures by introducing inert atoms into oxide hard mask layer used in growing channel semiconductor material

High-k metal gate electrode structure formed by removing a work function on sidewalls in replacement gate technology

Prevention of ILD Loss in Replacement Gate Technologies by Surface Treatmen

Semiconductor device comprising replacement gate electrode structures and self-aligned contact elements formed by a late contact fill

Temperature monitoring in a semiconductor device by using a PN junction based on silicon/germanium materials

Reducing the creation of charge traps at gate dielectrics in MOS transistors by performing a hydrogen treatment

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE

In situ monitoring of metal contamination during microstructure processing

Semiconductor device having improved halo structures and a method of forming the halo structures of a semiconductor device

Semiconductor device comprising a metal gate stack of reduced height and method of forming the same

TEMPERATURE MONITORING IN A SEMICONDUCTOR DEVICE BY USING AN PN JUNCTION BASED ON SILICON/GERMANIUM MATERIAL

REDUCING THE CREATION OF CHARGE TRAPS AT GATE DIELECTRICS IN MOS TRANSISTORS BY PERFORMING A HYDROGEN TREATMENT

Method of forming a semiconductor structure comprising a formation of at least one sidewall spacer structure

Enhancing transistor characteristics by a late deep implantation in combination with a diffusion-free anneal process

Method of forming a semiconductor structure

Field effect transistor having a stressed dielectric layer based on an enhanced device topography

Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques

Field effect transistor and method of forming a field effect transistor

Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same

Field effect transistors and methods for fabricating the same

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING TRANSISTOR ELEMENTS WITH DIFFERENTLY STRESSED CHANNEL REGIONS

FORMATION OF SILICIDED SURFACES FOR SILICON/CARBON SOURCE/DRAIN REGIONS

Method of forming different silicide portions on different silicon-containing regions in a semiconductor device

Semiconductor device having different metal silicide portions and method for fabricating the semiconductor device

Semiconductor device having T-shaped gate structure comprising in situ sidewall spacers and method of forming the semiconductor device

Semiconductor device having different metal-semiconductor portions formed in a semiconductor region and a method for fabricating the semiconductor device

Method of removing features using an improved removal process in the fabrication of a semiconductor device

Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions

Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device

Semiconductor device having a retrograde dopant profile in a channel region

Method and system for increasing product yield by controlling lithography on the basis of electrical speed data

Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same

Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device