Langquaid
Germany
28
2026-07-02
The entities that hold a legal rights for patent applications filed by inventor Patten Richard:
Richard Patten from Langquaid, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
MOLDED CHIP PACKAGING AND PROCESS FOR MAKING THE SAME
#2 | 2026-01-15PACKAGE STACKING USING CHIP TO WAFER BONDING
#3 | 2025-05-22FAN OUT PACKAGING POP MECHANICAL ATTACH METHOD
#4 | 2025-05-22INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK
#5 | 2024-06-27PACKAGE STACKING USING CHIP TO WAFER BONDING
#6 | 2023-10-26Fan out packaging pop mechanical attach method
#7 | 2023-01-26Integrated circuit package having wirebonded multi-die stack
#8 | 2022-04-07Package stacking using chip to wafer bonding
#9 | 2021-02-04Microelectronic packages with high integration microelectronic dice stack
#10 | 2020-08-27Wafer level package structure with internal conductive layer
#11 | 2020-07-09Microelectronic packages with high integration microelectronic dice stack
#12 | 2020-06-04Semiconductor die package with more than one hanging die
#13 | 2020-03-26NOVEL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP), FLIP-CHIP CHIP SCALE PACKAGE (FCCSP), AND FAN OUT SHIELDING CONCEPTS
#14 | 2019-11-07Method, apparatus and system to interconnect packaged integrated circuit dies
#15 | 2019-10-10Fan out packaging pop mechanical attach method
#16 | 2019-04-25OPTICAL FIBER CONNECTION ON PACKAGE EDGE
#17 | 2019-04-11Microelectronic packages with high integration microelectronic dice stack
#18 | 2019-03-07Integrated circuit packages including an optical redistribution layer
#19 | 2019-01-17Method, apparatus and system to interconnect packaged integrated circuit dies
#20 | 2018-12-13Wafer level package structure with internal conductive layer
#21 | 2018-11-15Package stacking using chip to wafer bonding
#22 | 2018-11-01INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK
#23 | 2018-07-12Integrated circuit package having wirebonded multi-die stack
#24 | 2018-01-02Electronic device package
#25 | 2017-10-05Integrated circuit packages including an optical redistribution layer
#26 | 2017-10-05Microelectronic package with illuminated backside exterior
#27 | 2017-06-22FLIP-CHIP PACKAGE WITH THERMAL DISSIPATION LAYER
#28 | 2016-09-22Integrated circuit package having wirebonded multi-die stack
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