Inventor profile of:

Michelle C. Jen

City:

Mountain View, California

Country:

United States

Published Applications:

20

Last publication date:

2024-05-16

Top Assignees for applications by Michelle C. Jen

The entities that hold a legal rights for patent applications filed by inventor Jen Michelle C.:

Recent patent applications by Jen Michelle C.

Michelle C. Jen from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-05-16
US20240160585A1
Physics

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

#2 | 2024-01-11
US20240012759A1
Physics

SHARED BUFFERED MEMORY ROUTING

#3 | 2022-08-25
US20220269641A1
Physics

Recalibration of PHY circuitry for the PCI express (PIPE) interface based on using a message bus interface

#4 | 2022-01-13
US20220012203A1
Physics

Flex bus protocol negotiation and enabling sequence

#5 | 2022-01-13
US20220012189A1
Physics

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

#6 | 2022-01-13
US20220012140A1
Physics

HARDWARE LOGGING FOR LANE MARGINING AND CHARACTERIZATION

#7 | 2022-01-13
US20220011849A1
Physics

ALTERNATE PHYSICAL LAYER POWER MODE

#8 | 2021-12-23
US20210399982A1
Electricity

Techniques to support multiple protocols between computer system interconnects

#9 | 2021-09-30
US20210303482A1
Physics

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

#10 | 2021-08-05
US20210240623A1
Physics

Shared buffered memory routing

#11 | 2021-02-04
US20210034565A1
Physics

Recalibration of PHY circuitry for the PCI express (pipe) interface based on using a message bus interface

#12 | 2020-07-02
US20200210366A1
Physics

Flex bus protocol negotiation and enabling sequence

#13 | 2019-10-24
US20190324523A1
Physics

ALTERNATE PHYSICAL LAYER POWER MODE

#14 | 2019-10-03
US20190303342A1
Physics

Recalibration of PHY circuitry for the PCI Express (PIPE) interface based on using a message bus interface

#15 | 2019-04-11
US20190108124A1
Physics

Shared buffered memory routing

#16 | 2019-02-28
US20190065426A1
Physics

Flex bus protocol negotiation and enabling sequence

#17 | 2019-01-03
US20190007310A1
Electricity

Techniques to support multiple protocols between computer system interconnects

#18 | 2018-03-08
US20180067855A1
Physics

SHARED BUFFERED MEMORY ROUTING

#19 | 2016-09-29
US20160283375A1
Physics

Shared buffered memory routing

#20 | 2016-09-29
US20160283303A1
Physics

RELIABILITY, AVAILABILITY, AND SERVICEABILITY IN MULTI-NODE SYSTEMS WITH DISAGGREGATED MEMORY

InventorID:

1664962 ⎘