Hsinchu
Taiwan
64
2026-06-04
The entities that hold a legal rights for patent applications filed by inventor Lung Hsiang-Lan:
Hsiang-Lan Lung from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:
COMPUTATIONAL STORAGE DEVICE, COMPUTATIONAL STORAGE SYSTEM AND OPERATION METHOD FOR DISKANN SEARCH
#2 | 2026-06-02Computational storage device, computational storage system and operation method for DiskANN search
#3 | 2025-07-24METHOD FOR OPERATING MEMORY DEVICE
#4 | 2019-05-09Memory device and method for fabricating the same
#5 | 2019-03-28Memory device and method for fabricating the same
#6 | 2018-11-27Method for manufacturing three dimensional stacked semiconductor structure and structure manufactured by the same
#7 | 2018-11-22Memory device and method for fabricating the same
#8 | 2018-10-18Manufacturing method of semiconductor structure
#9 | 2018-10-04Memory structure and method for manufacturing the same
#10 | 2018-07-17Memory device and method for operating the same
#11 | 2017-11-14Memory structure, method of operating the same, and method of manufacturing the same
#12 | 2017-01-03Memory structure
#13 | 2016-11-10Memory device and operation method
#14 | 2016-10-18Refresh of nonvolatile memory cells and reference cells with resistance drift
#15 | 2012-05-10Phase change device for interconnection of programmable logic device
#16 | 2011-08-18Method for fabrication of crystalline diodes for resistive memories
#17 | 2011-05-26Memory device
#18 | 2011-03-03Flat lower bottom electrode for phase change memory cell
#19 | 2010-08-05Current constricting phase change memory element structure
#20 | 2009-07-02Method of forming a small contact in phase-change memory
#21 | 2009-02-26High density chalcogenide memory cells
#22 | 2009-01-15Current constricting phase change memory element structure
#23 | 2009-01-01Phase change memory with tapered heater
#24 | 2008-08-14Method for manufacturing a phase change memory device with pillar bottom electrode
#25 | 2008-01-17Method of forming a chalcogenide memory cell having an ultrasmall cross-sectional area and a chalcogenide memory cell produced by the method
#26 | 2007-12-06Magnetic random access memory using single crystal self-aligned diode
#27 | 2007-11-15High density chalcogenide memory cells
#28 | 2007-11-08Thin film phase-change memory
#29 | 2007-10-25Method for programming multi-level nitride read-only memory cells
#30 | 2007-10-11Common word line edge contact phase-change memory
#31 | 2006-11-16Thin film phase-change memory
#32 | 2006-11-09Anti-fuse one-time-programmable nonvolatile memory
#33 | 2006-09-07Manufacturing method of one-time programmable read only memory
#34 | 2006-07-20Horizontal chalcogenide element defined by a pad for use in solid-state memories
#35 | 2006-06-29Method for programming multi-level nitride read-only memory cells
#36 | 2006-06-29Method of forming a small contact in phase-change memory and a memory cell produced by the method
#37 | 2006-06-27High density chalcogenide memory cells
#38 | 2006-06-01Chalcogenide memory having a small active region
#39 | 2006-05-30One-time programmable read only memory and manufacturing method thereof
#40 | 2006-05-18Method of determining optimal voltages for operating two-side non-volatile memory and the operating methods
#41 | 2006-05-11Method of forming a chalcogenide memory cell having an ultrasmall cross-sectional area and a chalcogenide memory cell produced by the method
#42 | 2006-05-04Common word line edge contact phase-change memory
#43 | 2005-11-01High density single transistor ferroelectric non-volatile memory
#44 | 2005-10-06Method of multi-level cell FeRAM
#45 | 2005-09-22Tunneling diode magnetic junction memory
#46 | 2005-09-08MRAM array employing spin-filtering element connected by spin-hold element to MRAM cell structure for enhanced magnetoresistance
#47 | 2005-09-06Structure and operating method for nonvolatile memory cell
#48 | 2005-08-04Trap read only non-volatile memory (TROM)
#49 | 2005-07-28Thin film phase-change memory
#50 | 2005-07-07Horizontal chalcogenide element defined by a pad for use in solid-state memories
#51 | 2005-07-05Ferroelectric device and method for making
#52 | 2005-06-093D polysilicon ROM and method of fabrication thereof
#53 | 2005-06-09Nonvolatile memory programmable by a heat induced chemical reaction
#54 | 2005-06-09Method of making a nonvolatile memory programmable by a heat induced chemical reaction
#55 | 2005-05-17Non-volatile semiconductor memory cell utilizing poly-edge discharge
#56 | 2005-05-05Spacer chalcogenide memory device
#57 | 2005-04-07Mask read only memory containing diodes and method of manufacturing the same
#58 | 2005-03-29Nonvolatile memory programmble by a heat induced chemical reaction
#59 | 2005-03-24Chalcogenide phase-change non-volatile memory, memory device and method for fabricating the same
#60 | 2005-03-24Spacer chalcogenide memory method
#61 | 2005-03-08Spacer chalcogenide memory method and device
#62 | 2005-03-03Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof
#63 | 2005-02-17Split-gate non-volatile memory
#64 | 2005-01-04Chalcogenide memory device with multiple bits per cell
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