Munich
Germany
566
2014-03-06
523
2015-06-23
These are the the leading inventors for applications assigned to Qimonda AG:
Qimonda AG based in Munich, DE has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Integrated circuit including vertical diode
#2 | 2013-11-14 β Patent 8,589,765 granted on 2013-11-19Memory read-out
#3 | 2012-12-13 β Patent 8,879,260 granted on 2014-11-04Heat transfer system
#4 | 2012-08-02 β Patent 8,674,999 granted on 2014-03-18Circuit
#5 | 2012-05-31 β Patent 9,111,609 granted on 2015-08-18Concentric phase change memory element
#6 | 2012-05-24 β Patent 8,362,537 granted on 2013-01-29Memory devices including semiconductor pillars
#7 | 2012-05-03 β Patent 8,250,436 granted on 2012-08-21Memory-module controller, memory controller and corresponding memory arrangement and also method for error correction
#8 | 2012-02-09 β Patent 8,592,258 granted on 2013-11-26Semiconductor package and method of attaching semiconductor dies to substrates
#9 | 2011-09-29 β Patent 8,581,405 granted on 2013-11-12Integrated circuit having a semiconductor substrate with barrier layer
#10 | 2011-08-25 β Patent 8,305,834 granted on 2012-11-06Semiconductor memory with memory cell portions having different access speeds
#11 | 2011-08-18 β Patent 8,637,844 granted on 2014-01-28Method for fabrication of crystalline diodes for resistive memories
#12 | 2011-07-28 β Patent 8,473,808 granted on 2013-06-25Semiconductor memory having non-standard form factor
#13 | 2011-07-07INTEGRATED DEVICE
#14 | 2011-04-21 β Patent 8,115,277 granted on 2012-02-14Integrated circuit having a material structured by a projection
#15 | 2011-04-21 β Patent 8,389,973 granted on 2013-03-05Memory using tunneling field effect transistors
#16 | 2011-04-07 β Patent 8,116,157 granted on 2012-02-14Integrated circuit
#17 | 2011-03-10 β Patent 8,098,086 granted on 2012-01-17Integrated circuit and programmable delay
#18 | 2011-02-10Stacking Technique for Circuit Devices
#19 | 2010-12-23 β Patent 8,384,062 granted on 2013-02-26Memory including vertical bipolar select device and resistive memory element
#20 | 2010-12-02 β Patent 8,468,401 granted on 2013-06-18Apparatus and method for manufacturing a multiple-chip memory device with multi-stage testing
#21 | 2010-11-18 β Patent 8,250,293 granted on 2012-08-21Data exchange in resistance changing memory for improved endurance
#22 | 2010-11-18 β Patent 8,208,294 granted on 2012-06-26Resistive memory cell accessed using two bit lines
#23 | 2010-10-21 β Patent 8,189,374 granted on 2012-05-29Memory device including an electrode having an outer portion with greater resistivity
#24 | 2010-10-21 β Patent 8,633,053 granted on 2014-01-21Photovoltaic device
#25 | 2010-05-27 β Patent 7,965,120 granted on 2011-06-21Digitally controlled CML buffer
#26 | 2010-05-20 β Patent 8,797,811 granted on 2014-08-05Method and apparatus to reduce power consumption by transferring functionality from memory components to a memory interface
#27 | 2010-05-20 β Patent 8,241,989 granted on 2012-08-14Integrated circuit with stacked devices
#28 | 2010-05-06Ferroelectric Memory Cell Arrays and Method of Operating the Same
#29 | 2010-04-22 β Patent 7,894,290 granted on 2011-02-22Method and apparatus for performing internal hidden refreshes while latching read/write commands, address and data information for later operation
#30 | 2010-04-22 β Patent 8,294,188 granted on 2012-10-234 Fmemory cell array
#31 | 2010-04-22 β Patent 7,759,704 granted on 2010-07-20Memory cell array comprising wiggled bit lines
#32 | 2010-04-15 β Patent 8,031,539 granted on 2011-10-04Memory device and memory system comprising a memory device and a memory control device
#33 | 2010-04-15 β Patent 8,004,072 granted on 2011-08-23Packaging systems and methods
#34 | 2010-04-15 β Patent 8,097,955 granted on 2012-01-17Interconnect structures and methods
#35 | 2010-04-15 β Patent 8,008,729 granted on 2011-08-30Integrated circuit with a contact structure including a portion arranged in a cavity of a semiconductor structure
#36 | 2010-04-15 β Patent 8,138,538 granted on 2012-03-20Interconnect structure for semiconductor devices
#37 | 2010-04-08 β Patent 8,063,394 granted on 2011-11-22Integrated circuit
#38 | 2010-04-01 β Patent 7,855,929 granted on 2010-12-21Apparatus for the dynamic detection, selection and deselection of leaking decoupling capacitors
#39 | 2010-04-01 β Patent 8,390,453 granted on 2013-03-05Integrated circuit with a rectifier element
#40 | 2010-04-01 β Patent 7,863,136 granted on 2011-01-04Method of manufacturing integrated circuits including a FET with a gate spacer and a fin
#41 | 2010-04-01 β Patent 8,536,620 granted on 2013-09-17Integrated circuit including a hetero-interface and self adjusted diffusion method for manufacturing the same
#42 | 2010-03-25 β Patent 8,495,310 granted on 2013-07-23Method and system including plural memory controllers and a memory access control bus for accessing a memory device
#43 | 2010-03-25 β Patent 7,796,446 granted on 2010-09-14Memory dies for flexible use and method for configuring memory dies
#44 | 2010-03-11 β Patent 7,771,206 granted on 2010-08-10Horizontal dual in-line memory modules
#45 | 2010-03-11 β Patent 8,130,537 granted on 2012-03-06Phase change memory cell with MOSFET driven bipolar access device
#46 | 2010-03-11 β Patent 8,254,166 granted on 2012-08-28Integrated circuit including doped semiconductor line having conductive cladding
#47 | 2010-03-04 β Patent 8,595,449 granted on 2013-11-26Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition
#48 | 2010-03-04Metrology Mark with Elements Arranged in a Matrix, Method of Manufacturing Same and Alignment Method
#49 | 2010-02-25 β Patent 7,848,153 granted on 2010-12-07High speed memory architecture
#50 | 2010-02-25 β Patent 7,928,790 granted on 2011-04-19Integrated circuit and programmable delay
#51 | 2010-02-25 β Patent 8,334,599 granted on 2012-12-18Electronic device having a chip stack
#52 | 2010-02-25 β Patent 7,888,665 granted on 2011-02-15Integrated circuit including memory cell having cup-shaped electrode interface
#53 | 2010-02-18Compensation of Process-Induced Displacement
#54 | 2010-02-18 β Patent 7,872,902 granted on 2011-01-18Integrated circuit with bit lines positioned in different planes
#55 | 2010-02-11 β Patent 8,072,085 granted on 2011-12-06Semiconductor device with plastic package molding compound, semiconductor chip and leadframe and method for producing the same
#56 | 2010-02-11 β Patent 8,125,006 granted on 2012-02-28Array of low resistive vertical diodes and method of production
#57 | 2010-02-04 β Patent 8,440,475 granted on 2013-05-14Alignment calculation
#58 | 2010-02-04 β Patent 7,804,708 granted on 2010-09-28Integrated circuit including an array of memory cells and method
#59 | 2010-02-04 β Patent 8,009,477 granted on 2011-08-30Integrated circuit and method of forming an integrated circuit
#60 | 2010-02-04 β Patent 7,915,713 granted on 2011-03-29Field effect transistors with channels oriented to different crystal planes
#61 | 2010-01-28 β Patent 7,864,579 granted on 2011-01-04Integrated circuits having a controller to control a read operation and methods for operating the same
#62 | 2010-01-28 β Patent 7,848,134 granted on 2010-12-07FB DRAM memory with state memory
#63 | 2010-01-28 β Patent 7,868,415 granted on 2011-01-11Integrated circuit with an active area line having at least one form-supporting element and corresponding method of making an integrated circuit
#64 | 2010-01-21 β Patent 7,847,415 granted on 2010-12-07Method for manufacturing a multichip module assembly
#65 | 2010-01-21 β Patent 7,893,511 granted on 2011-02-22Integrated circuit, memory module, and method of manufacturing an integrated circuit
#66 | 2010-01-21 β Patent 7,838,925 granted on 2010-11-23Integrated circuit including a vertical transistor and method
#67 | 2010-01-14METHOD FOR OPTIMIZING THE LAYOUT OF AT LEAST ONE TRANSFER DEVICE FOR PRODUCTION OF A DIRECT OR INDIRECT STRUCTURE
#68 | 2010-01-14 β Patent 7,791,149 granted on 2010-09-07Integrated circuit including a dielectric layer
#69 | 2010-01-12 β Patent 7,646,320 granted on 2010-01-12Circuit with selectable data paths
#70 | 2010-01-07 β Patent 7,920,430 granted on 2011-04-05Integrated circuits and methods for operating the same using a plurality of buffer circuits in an access operation
#71 | 2010-01-07 β Patent 8,310,866 granted on 2012-11-13MRAM device structure employing thermally-assisted write operations and thermally-unassisted self-referencing operations
#72 | 2010-01-07 β Patent 7,876,606 granted on 2011-01-25Integrated circuit for programming a memory cell
#73 | 2010-01-07Multiple Patterning Method
#74 | 2009-12-31 β Patent 7,863,700 granted on 2011-01-04Magnetoresistive sensor with tunnel barrier and method
#75 | 2009-12-31 β Patent 7,960,843 granted on 2011-06-14Chip arrangement and method of manufacturing a chip arrangement
#76 | 2009-12-31 β Patent 7,902,616 granted on 2011-03-08Integrated circuit having a magnetic tunnel junction device and method
#77 | 2009-12-31 β Patent 8,631,383 granted on 2014-01-14Integrated circuits, standard cells, and methods for generating a layout of an integrated circuit
#78 | 2009-12-31 β Patent 8,742,387 granted on 2014-06-03Resistive memory devices with improved resistive changing elements
#79 | 2009-12-24 β Patent 8,586,960 granted on 2013-11-19Integrated circuit including vertical diode
#80 | 2009-12-24 β Patent 7,795,109 granted on 2010-09-14Isolation trenches with conductive plates
#81 | 2009-12-17 β Patent 7,929,336 granted on 2011-04-19Integrated circuit including a memory element programmed using a seed pulse
#82 | 2009-12-17 β Patent 7,915,667 granted on 2011-03-29Integrated circuits having a contact region and methods for manufacturing the same
#83 | 2009-12-10 β Patent 7,940,582 granted on 2011-05-10Integrated circuit that stores defective memory cell addresses
#84 | 2009-12-10 β Patent 8,284,596 granted on 2012-10-09Integrated circuit including an array of diodes coupled to a layer of resistance changing material
#85 | 2009-12-10 β Patent 8,618,600 granted on 2013-12-31Integrated circuit including a buried wiring line
#86 | 2009-12-10 β Patent 7,838,928 granted on 2010-11-23Word line to bit line spacing method and apparatus
#87 | 2009-12-03 β Patent 7,738,279 granted on 2010-06-15Integrated circuit and method of operating an integrated circuit
#88 | 2009-12-03System and Method For Modifying Signal Characteristics
#89 | 2009-12-03 β Patent 7,659,602 granted on 2010-02-09Semiconductor component with MIM capacitor
#90 | 2009-12-03 β Patent 7,893,519 granted on 2011-02-22Integrated circuit with conductive structures
#91 | 2009-12-03 β Patent 7,935,608 granted on 2011-05-03Storage cell having a T-shaped gate electrode and method for manufacturing the same
#92 | 2009-11-26 β Patent 7,880,210 granted on 2011-02-01Integrated circuit including an insulating structure below a source/drain region and method
#93 | 2009-11-19 β Patent 7,719,884 granted on 2010-05-18Integrated circuit, cell arrangement, method of manufacturing an integrated circuit, method of operating an integrated circuit, and memory module
#94 | 2009-11-19 β Patent 8,305,793 granted on 2012-11-06Integrated circuit with an array of resistance changing memory cells
#95 | 2009-11-19 β Patent 7,944,725 granted on 2011-05-17Semiconductor memory and method for operating a semiconductor memory
#96 | 2009-11-19 β Patent 8,093,696 granted on 2012-01-10Semiconductor device
#97 | 2009-11-19 β Patent 8,178,927 granted on 2012-05-15Integrated circuits having a contact structure having an elongate structure and methods for manufacturing the same
#98 | 2009-11-05 β Patent 7,751,231 granted on 2010-07-06Method and integrated circuit for determining the state of a resistivity changing memory cell
#99 | 2009-11-05 β Patent 7,903,454 granted on 2011-03-08Integrated circuit, memory cell array, memory module, and method of operating an integrated circuit
#100 | 2009-11-05 β Patent 8,054,473 granted on 2011-11-08Measurement method for determining dimensions of features resulting from enhanced patterning methods
Also check out Qimonda AG's (Munich, Germany) applicant profile with 3 patent applications submitted.
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