Inventor profile of:

Michael CHUDZIK

City:

Mountain View, California

Country:

United States

Published Applications:

21

Last publication date:

2026-04-30

Top Assignees for applications by Michael CHUDZIK

The entities that hold a legal rights for patent applications filed by inventor CHUDZIK Michael:

Recent patent applications by CHUDZIK Michael

Michael CHUDZIK from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-30
US20260123305A1
Electricity

Methods for Substrate Bonding

#2 | 2026-03-05
US20260068236A1
Electricity

TRENCH-BASED SUPER JUNCTION STRUCTURES VIA SIDEWALL DOPING

#3 | 2025-09-25
US20250301830A1
Electricity

INDIUM-GALLIUM-NITRIDE LIGHT EMITTING DIODES WITH LIGHT REFLECTING MIRRORS

#4 | 2025-09-11
US20250285992A1
Electricity

METHODS AND STRUCTURES FOR REDUCING WARPAGE

#5 | 2025-03-13
US20250087573A1
Electricity

METHOD AND MATERIAL SYSTEM FOR TUNABLE HYBRID BOND INTERCONNECT RESISTANCE

#6 | 2024-07-25
US20240247407A1
Chemistry; metallurgy

INDIUM-GALLIUM-NITRIDE LIGHT EMITTING DIODES WITH INCREASED QUANTUM EFFICIENCY

#7 | 2022-10-06
US20220319836A1
Electricity

NUCLEATION LAYERS FOR GROWTH OF GALLIUM-AND-NITROGEN-CONTAINING REGIONS

#8 | 2022-09-15
US20220293821A1
Electricity

Indium-gallium-nitride light emitting diodes with increased red-light quantum efficiency

#9 | 2022-09-08
US20220285584A1
Electricity

INDIUM-GALLIUM-NITRIDE LIGHT EMITTING DIODES WITH LIGHT REFLECTING MIRRORS

#10 | 2022-08-18
US20220259766A1
Chemistry; metallurgy

INDIUM-GALLIUM-NITRIDE LIGHT EMITTING DIODES WITH INCREASED QUANTUM EFFICIENCY

#11 | 2022-05-26
US20220165610A1
Electricity

Deep trench integration processes and devices

#12 | 2022-03-17
US20220085238A1
Electricity

Three color light sources integrated on a single wafer

#13 | 2021-07-15
US20210215664A1
Physics

Methods to fabricate dual pore devices

#14 | 2020-02-06
US20200044152A1
Electricity

PHYSICAL VAPOR DEPOSITION OF DOPED TRANSITION METAL OXIDE AND POST-DEPOSITION TREATMENT THEREOF FOR NON-VOLATILE MEMORY APPLICATIONS

#15 | 2020-01-30
US20200035822A1
Electricity

Horizontal gate all around and FinFET device isolation

#16 | 2018-03-01
US20180061978A1
Electricity

Horizontal gate all around and FinFET device isolation

#17 | 2017-07-06
US20170194430A1
Electricity

METHOD FOR FABRICATING NANOWIRES FOR HORIZONTAL GATE ALL AROUND DEVICES FOR SEMICONDUCTOR APPLICATIONS

#18 | 2017-06-22
US20170179252A1
Electricity

Multi-threshold voltage structures with a lanthanum nitride film and methods of formation thereof

#19 | 2017-01-19
US20170018624A1
Electricity

Horizontal gate all around device isolation

#20 | 2016-11-17
US20160336405A1
Electricity

Horizontal gate all around and FinFET device isolation

#21 | 2016-10-04
US14755099
Electricity

Horizontal gate all around device isolation

InventorID:

1714012 ⎘