Inventor profile of:

Venkatraman Prabhakar

City:

Pleasanton, California

Country:

United States

Published Applications:

67

Last publication date:

2025-08-07

Top Assignees for applications by Venkatraman Prabhakar

The entities that hold a legal rights for patent applications filed by inventor Prabhakar Venkatraman:

Recent patent applications by Prabhakar Venkatraman

Venkatraman Prabhakar from Pleasanton, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-08-07
US20250252298A1
Physics

COMPUTE-IN-MEMORY DEVICES, SYSTEMS AND METHODS OF OPERATION THEREOF

#2 | 2024-10-10
US20240339591A1
Electricity

SYSTEMS AND METHODS INVOLVING USE OF NITROGEN-CONTAINING PLASMA TO TREAT LITHIUM-ION CELL CATHODE MATERIALS

#3 | 2023-07-20
US20230231103A1
Electricity

Systems and Methods Involving Use of Nitrogen-Containing Plasma to Treat Lithium Iron Phosphate Cathodes

#4 | 2023-03-16
US20230081072A1
Electricity

Method of Integrating SONOS into HKMG Flow

#5 | 2022-11-10
US20220359006A1
Physics

Silicon-oxide-nitride-oxide-silicon multi-level non-volatile memory device and methods of fabrication thereof

#6 | 2022-09-29
US20220309328A1
Physics

Compute-in-memory devices, systems and methods of operation thereof

#7 | 2022-09-08
US20220284951A1
Physics

Silicon-oxide-nitride-oxide-silicon based multi-level non-volatile memory device and methods of operation thereof

#8 | 2021-11-04
US20210343999A1
Electricity

Methods involving use of nitrogen-containing plasma to treat liquid electrolyte lithium-ion cathode materials

#9 | 2021-05-27
US20210159346A1
Electricity

Silicon-oxide-nitride-oxide-silicon multi-level non-volatile memory device and methods of fabrication thereof

#10 | 2021-03-11
US20210074821A1
Electricity

EMBEDDED SONOS WITH TRIPLE GATE OXIDE AND MANUFACTURING METHOD OF THE SAME

#11 | 2020-12-24
US20200402588A1
Physics

Asymmetric pass field-effect transistor for nonvolatile memory

#12 | 2020-11-05
US20200350213A1
Electricity

Embedded SONOS and high voltage select gate with a high-K metal gate and manufacturing methods of the same

#13 | 2020-02-13
US20200051642A1
Physics

BIAS SCHEME FOR WORD PROGRAMMING IN NON-VOLATILE MEMORY AND INHIBIT DISTURB REDUCTION

#14 | 2020-01-16
US20200020402A1
Physics

Asymmetric pass field-effect transistor for non-volatile memory

#15 | 2019-10-17
US20190318785A1
Physics

SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES

#16 | 2019-05-16
US20190147960A1
Physics

Bias scheme for word programming in non-volatile memory and inhibit disturb reduction

#17 | 2019-03-21
US20190088487A1
Electricity

Embedded sonos with triple gate oxide and manufacturing method of the same

#18 | 2018-12-13
US20180358097A1
Physics

Asymmetric pass field-effect transistor for nonvolatile memory

#19 | 2018-08-28
US15683274
Electricity

Embedded SONOS with triple gate oxide and manufacturing method of the same

#20 | 2018-03-22
US20180082746A1
Physics

Systems, methods, and apparatus for memory cells with common source lines

#21 | 2018-03-08
US20180068735A1
Physics

Method to reduce program disturbs in non-volatile memory cells

#22 | 2018-02-08
US20180040625A1
Electricity

Complementary SONOS integration into CMOS flow

#23 | 2017-09-28
US20170278573A1
Physics

Systems, methods, and apparatus for memory cells with common source lines

#24 | 2017-09-14
US20170263622A1
Electricity

Embedded SONOS based memory cells

#25 | 2017-08-29
US15194201
Physics

Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells

#26 | 2017-06-15
US20170169888A1
Physics

Asymmetric pass field-effect transistor for nonvolatile memory

#27 | 2017-03-30
US20170092367A1
Physics

Asymmetric pass field-effect transistor for non-volatile memory

#28 | 2017-01-12
US20170011807A1
Physics

Method to reduce program disturbs in non-volatile memory cells

#29 | 2017-01-12
US20170011800A1
Physics

Systems, methods, and apparatus for memory cells with common source lines

#30 | 2016-09-08
US20160260730A1
Electricity

Embedded SONOS based memory cells

#31 | 2016-08-25
US20160247897A1
Electricity

Drain extended MOS transistors with split channel

#32 | 2016-07-28
US20160217861A1
Physics

Split voltage non-volatile latch cell

#33 | 2016-07-14
US20160204120A1
Electricity

Complimentary SONOS integration into CMOS flow

#34 | 2016-06-28
US13791758
Physics

Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells

#35 | 2015-10-15
US20150294731A1
Physics

Method to reduce program disturbs in non-volatile memory cells

#36 | 2015-10-08
US20150287811A1
Electricity

Methods to integrate SONOS into CMOS flow

#37 | 2015-10-08
US20150287464A1
Physics

Systems, methods, and apparatus for memory cells with common source lines

#38 | 2015-07-16
US20150200295A1
Electricity

Drain Extended MOS Transistors With Split Channel

#39 | 2015-06-18
US20150171104A1
Electricity

COMPLEMENTARY SONOS INTEGRATION INTO CMOS FLOW

#40 | 2015-06-18
US20150170744A1
Physics

Non-volatile memory and method of operating the same

#41 | 2015-02-12
US20150041881A1
Electricity

Embedded SONOS based memory cells

#42 | 2015-02-10
US14316615
Physics

Systems, methods, and apparatus for memory cells with common source lines

#43 | 2014-12-23
US14305137
Electricity

Methods to integrate SONOS into CMOS flow

#44 | 2014-10-09
US20140301139A1
Physics

Method to reduce program disturbs in non-volatile memory cells

#45 | 2014-09-18
US20140264552A1
Electricity

Nonvolatile memory cells and methods of making such cells

#46 | 2014-08-28
US20140239374A1
Electricity

Embedded SONOS based memory cells

#47 | 2014-07-17
US20140197864A1
Electricity

Non-volatile latch structures with small area for FPGA

#48 | 2014-03-18
US13920352
-

Method to reduce program disturbs in non-volatile memory cells

#49 | 2014-01-23
US20140021477A1
Electricity

Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes

#50 | 2013-05-16
US20130122629A1
Electricity

SYSTEMS, METHODS AND PRODUCTS INCLUDING FEATURES OF LASER IRRADIATION AND/OR CLEAVING OF SILICON WITH OTHER SUBSTRATES OR LAYERS

#51 | 2013-04-04
US20130083608A1
Physics

1T smart write

#52 | 2012-01-26
US20120018733A1
Electricity

Thin Film Solar Cells And Other Devices, Systems And Methods Of Fabricating Same, And Products Produced By Processes Thereof

#53 | 2011-12-15
US20110306180A1
Electricity

Systems, Methods and Products Involving Aspects of Laser Irradiation, Cleaving, and/or Bonding Silicon-Containing Material to Substrates

#54 | 2011-07-07
US20110165721A1
Electricity

SYSTEMS, METHODS AND PRODUCTS INCLUDING FEATURES OF LASER IRRADIATION AND/OR CLEAVING OF SILICON WITH OTHER SUBSTRATES OR LAYERS

#55 | 2011-06-28
US12009723
-

Low voltage non-volatile memory with charge trapping layer

#56 | 2011-05-17
US12288762
-

Multi-programmable non-volatile memory cell

#57 | 2011-05-05
US20110101364A1
Electricity

Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes

#58 | 2011-04-21
US20110089429A1
Electricity

SYSTEMS, METHODS AND MATERIALS INVOLVING CRYSTALLIZATION OF SUBSTRATES USING A SEED LAYER, AS WELL AS PRODUCTS PRODUCED BY SUCH PROCESSES

#59 | 2011-04-21
US20110089420A1
Electricity

Backside only contact thin-film solar cells and devices, systems and methods of fabricating same, and products produced by processes thereof

#60 | 2011-02-22
US12009663
-

Low voltage low cost non-volatile memory

#61 | 2010-11-16
US12009710
-

Non-volatile latch with low voltage operation

#62 | 2009-01-15
US20090014772A1
Physics

EEPROM memory cell with first-dopant-type control gate transister, and second-dopant type program/erase and access transistors formed in common well

#63 | 2008-11-06
US20080273401A1
Physics

Method of erasing a block of memory cells

#64 | 2008-11-06
US20080273392A1
Physics

Method of programming a selected memory cell

#65 | 2008-09-18
US20080225601A1
Physics

EEPROM memory device with cell having NMOS in a P pocket as a control gate, PMOS program/erase transistor, and PMOS access transistor in a common well

#66 | 2008-08-07
US20080186773A1
Electricity

One or multiple-times programmable device

#67 | 2008-01-29
US11732323
-

Low power high density random access memory flash cells and arrays

InventorID:

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