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Inventor profile of:

Paul A. PACKAN

City:

Beaverton, Oregon

Country:

United States

Published Applications:

8

Last publication date:

2023-08-10

Top Assignees for applications by Paul A. PACKAN

The entities that hold a legal rights for patent applications filed by inventor PACKAN Paul A.:

  • INTEL CORPORATION 7 Santa Clara, CA United States

Recent patent applications by PACKAN Paul A.

Paul A. PACKAN from Beaverton, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-08-10
US20230253499A1
Electricity

DIFFUSED TIP EXTENSION TRANSISTOR

#2 | 2021-02-18
US20210050448A1
Electricity

Diffused tip extension transistor

#3 | 2019-08-08
US20190245088A1
Electricity

Diffused tip extension transistor

#4 | 2016-12-29
US20160380102A1
Electricity

Diffused tip extension transistor

#5 | 2008-02-14
US20080036005A1
Electricity

CMOS fabrication process utilizing special transistor orientation

#6 | 2007-12-25
US9727296
-

CMOS fabrication process utilizing special transistor orientation

#7 | 2005-01-27
US20050017309A1
Electricity

Nitrogen controlled growth of dislocation loop in stress enhanced transistor

#8 | 2005-01-20
US20050014351A1
Electricity

Nitrogen controlled growth of dislocation loop in stress enhanced transistor

InventorID:

1751927 ⎘

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