Inventor profile of:

Bernd SCHMOELZER

City:

Radenthein

Country:

Austria

Published Applications:

25

Last publication date:

2026-04-16

Top Assignees for applications by Bernd SCHMOELZER

The entities that hold a legal rights for patent applications filed by inventor SCHMOELZER Bernd:

Recent patent applications by SCHMOELZER Bernd

Bernd SCHMOELZER from Radenthein, AT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-16
US20260107826A1
Electricity

SEMICONDUCTOR PACKAGES INCLUDING A PACKAGE BODY WITH GROOVES FORMED THEREIN

#2 | 2024-11-28
US20240395646A1
Electricity

PACKAGE WITH ELECTRICALLY INSULATED CARRIER AND AT LEAST ONE STEP ON ENCAPSULANT

#3 | 2024-07-25
US20240250004A1
Electricity

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE INCLUDING AN EMBEDDED SEMICONDUCTOR DIE

#4 | 2024-05-23
US20240170377A1
Electricity

Semiconductor Package Providing an Even Current Distribution and Stray Inductance Reduction and a Semiconductor Device Module

#5 | 2024-05-16
US20240162205A1
Electricity

POWER SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME

#6 | 2024-02-01
US20240038612A1
Electricity

Package with electrically insulated carrier and at least one step on encapsulant

#7 | 2024-01-11
US20240014104A1
Electricity

Semiconductor Package or a Printed Circuit Board, Both Modified to One or More of Reduce, Inverse or Utilize Magnetic Coupling Caused by the Load Current of a Semiconductor Transistor

#8 | 2023-11-09
US20230361009A1
Electricity

SEMICONDUCTOR PACKAGE HAVING AN EMBEDDED ELECTRICAL CONDUCTOR CONNECTED BETWEEN PINS OF A SEMICONDUCTOR DIE AND A FURTHER DEVICE

#9 | 2023-11-09
US20230360929A1
Electricity

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE MODULE WITH INCREASED RELIABILITY AND A SEMICONDUCTOR DEVICE MODULE

#10 | 2023-09-21
US20230298956A1
Electricity

SEMICONDUCTOR PACKAGES INCLUDING A PACKAGE BODY WITH GROOVES FORMED THEREIN

#11 | 2023-09-07
US20230282591A1
Electricity

SEMICONDUCTOR PACKAGE AND A SEMICONDUCTOR DEVICE MODULE INCLUDING THE SAME

#12 | 2023-07-20
US20230230905A1
Electricity

STACKED MODULE ARRANGEMENT

#13 | 2023-04-06
US20230106642A1
Electricity

EMBEDDED PACKAGE WITH DELAMINATION MITIGATION

#14 | 2023-03-23
US20230093341A1
Electricity

Semiconductor Package Comprising a Cavity with Exposed Contacts and a Semiconductor Module

#15 | 2022-11-24
US20220375832A1
Electricity

Method of forming a semiconductor package with connection lug

#16 | 2022-11-24
US20220375830A1
Electricity

Semiconductor package with connection lug

#17 | 2022-05-19
US20220157682A1
Electricity

Package with electrically insulated carrier and at least one step on encapsulant

#18 | 2022-05-12
US20220148934A1
Electricity

Linear spacer for spacing a carrier of a package

#19 | 2022-03-31
US20220102311A1
Electricity

Semiconductor device module having vertical metallic contacts and a method for fabricating the same

#20 | 2021-08-12
US20210249334A1
Electricity

Semiconductor device including an embedded semiconductor die

#21 | 2019-09-26
US20190295920A1
Electricity

Multi-package top-side-cooling

#22 | 2019-03-14
US20190080973A1
Electricity

SMD package with top side cooling

#23 | 2019-02-21
US20190057923A1
Electricity

Assembly and method for mounting an electronic component to a substrate

#24 | 2017-06-22
US20170179009A1
Electricity

Semiconductor devices with improved thermal and electrical performance

#25 | 2017-05-25
US20170148743A1
Electricity

Semiconductor chip package comprising side wall marking

InventorID:

1887068 ⎘