Inventor profile of:

BENJAMIN STASSEN COOK

City:

Rockwall, Texas

Country:

United States

Published Applications:

19

Last publication date:

2026-04-16

Top Assignees for applications by BENJAMIN STASSEN COOK

The entities that hold a legal rights for patent applications filed by inventor COOK BENJAMIN STASSEN:

Recent patent applications by COOK BENJAMIN STASSEN

BENJAMIN STASSEN COOK from Rockwall, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-16
US20260107709A1
Electricity

SEMICONDUCTOR DEVICE PACKAGE THERMAL CONDUIT

#2 | 2023-09-28
US20230307312A1
Electricity

HIGH THERMAL CONDUCTIVITY VIAS BY ADDITIVE PROCESSING

#3 | 2021-09-02
US20210272804A1
Electricity

SEMICONDCTOR DEVICE PACKAGE THERMAL CONDUIT

#4 | 2021-03-25
US20210091012A1
Electricity

Floating die package

#5 | 2021-01-07
US20210005537A1
Electricity

Sintered Metal Flip Chip Joints

#6 | 2019-07-25
US20190229051A1
Electricity

Interconnect via with grown graphitic material

#7 | 2018-08-23
US20180240886A1
Electricity

Graphene heterolayers for electronic applications

#8 | 2018-05-31
US20180151487A1
Electricity

Interconnect via with grown graphitic material

#9 | 2018-05-31
US20180151471A1
Electricity

High thermal conductivity vias by additive processing

#10 | 2018-05-31
US20180151470A1
Electricity

Integrated circuit nanoparticle thermal routing structure in interconnect region

#11 | 2018-05-31
US20180151467A1
Electricity

Semiconductor device package thermal conduit

#12 | 2018-05-31
US20180151464A1
Electricity

Thermal routing trench by additive processing

#13 | 2018-05-31
US20180151463A1
Electricity

Integrated circuit nanoparticle thermal routing structure over interconnect region

#14 | 2017-11-16
US20170330841A1
Electricity

Floating die package

#15 | 2017-10-26
US20170309553A1
Electricity

Lead frame surface modifications for high voltage isolation

#16 | 2017-10-26
US20170309549A1
Electricity

Sintered Metal Flip Chip Joints

#17 | 2017-10-17
US15438174
Electricity

Heterostructure interconnects for high frequency applications

#18 | 2017-09-21
US20170271174A1
Electricity

Printed adhesion deposition to mitigate integrated circuit delamination

#19 | 2017-07-06
US20170194170A1
Electricity

Printed adhesion deposition to mitigate integrated circuit package delamination

InventorID:

1925000 ⎘