Heverlee
Belgium
31
2026-06-18
The entities that hold a legal rights for patent applications filed by inventor Beyne Eric:
Eric Beyne from Heverlee, BE has applied for patents for these inventions. The list has both pending applications and granted patents:
Method for Producing a Through-semiconductor Connection
#2 | 2025-11-13METHODS OF PRODUCING A RECEIVING SUBSTRATE FOR BONDING SEMICONDUCTOR DIES THERETO
#3 | 2025-11-13METHODS OF PRODUCING A RECEIVING SUBSTRATE FOR BONDING SEMICONDUCTOR DIES THERETO
#4 | 2025-08-21Semiconductor Component Including One or More Conductors Comprising a Stack of Ferromagnetic and Nonmagnetic Materials
#5 | 2025-04-10Semiconductor Component Comprising Structured Contacts and A Method for Producing the Component
#6 | 2025-04-10Method for Thinning a Semiconductor Substrate
#7 | 2024-09-05METHOD FOR PRODUCING SOLDER BUMPS ON A SUPERCONDUCTING QUBIT SUBSTRATE
#8 | 2024-07-04SEMICONDUCTOR COMPONENT WITH METAL-INSULATOR-METAL CAPACITOR ASSEMBLY
#9 | 2024-06-27MICRO-ELECTRONIC COMPONENT COMBINING POWER DELIVERY AND COOLING FROM THE BACK SIDE
#10 | 2024-06-20METHOD FOR BONDING AND INTERCONNECTING MICRO-ELECTRONIC COMPONENTS
#11 | 2024-04-11DEVICE AND SYSTEM FOR COOLING AN ELECTRONIC COMPONENT
#12 | 2023-06-22Quantum Bit Chip and Method for Fabricating Quantum Bit Chip
#13 | 2023-06-01SEMICONDUCTOR COMPONENT INCLUDING BACK SIDE INPUT/OUTPUT SIGNAL ROUTING
#14 | 2023-05-11METHOD OF PRODUCING AN INTEGRATED CIRCUIT CHIP INCLUDING A BACK-SIDE POWER DELIVERY NETWORK
#15 | 2023-03-16INTEGRATED CIRCUIT CHIP INCLUDING BACK SIDE POWER DELIVERY TRACKS
#16 | 2022-02-03Substrate, assembly and method for wafer-to-wafer hybrid bonding
#17 | 2021-05-27Method of direct bonding semiconductor components
#18 | 2021-04-01Method for dicing a semiconductor substrate into a plurality of dies
#19 | 2020-12-24Method for the electrical bonding of semiconductor components
#20 | 2020-06-25Method for packaging semiconductor dies
#21 | 2020-06-11Method for fabricating an optical device
#22 | 2020-05-14Method for contacting a buried interconnect rail of an integrated circuit chip from the back side of the IC
#23 | 2020-04-16Method for packaging semiconductor dies
#24 | 2018-08-30Method of bonding semiconductor substrates
#25 | 2018-05-24Integrated circuit chip with power delivery network on the backside of the chip
#26 | 2018-05-10Method for bonding semiconductor chips to a landing wafer
#27 | 2018-03-08Method for bonding and interconnecting integrated circuit devices
#28 | 2018-03-01Semiconductor die package and method of producing the package
#29 | 2017-10-19Method of bonding semiconductor substrates
#30 | 2017-07-06Liquid cooling of electronic devices
#31 | 2017-07-06Method for self-aligned solder reflow bonding and devices obtained thereof
1925086 ⎘