Inventor profile of:

Akif SULTAN

City:

Austin, Texas

Country:

United States

Published Applications:

21

Last publication date:

2013-08-15

Top Assignees for applications by Akif SULTAN

The entities that hold a legal rights for patent applications filed by inventor SULTAN Akif:

Recent patent applications by SULTAN Akif

Akif SULTAN from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2013-08-15
US20130207201A1
Electricity

Semiconductor devices having stressor regions and related fabrication methods

#2 | 2013-04-18
US20130092957A1
Electricity

Self-aligned silicidation for replacement gate process

#3 | 2012-01-26
US20120018816A1
Electricity

Self-aligned silicidation for replacement gate process

#4 | 2012-01-05
US20120003802A1
Electricity

Transistor with asymmetric silicon germanium source region

#5 | 2011-12-15
US20110303980A1
Electricity

Semiconductor devices having stressor regions and related fabrication methods

#6 | 2011-10-11
US11278618
-

Transistor with asymmetric silicon germanium source region

#7 | 2011-07-14
US20110171801A1
Electricity

Method of fabricating multi-fingered semiconductor devices on a common substrate

#8 | 2010-02-25
US20100044761A1
Electricity

Semiconductor device and methods for fabricating same

#9 | 2009-04-09
US20090090969A1
Electricity

Electronic device and method of biasing

#10 | 2009-03-26
US20090081860A1
Electricity

Method of forming transistor devices with different threshold voltages using halo implant shadowing

#11 | 2009-03-26
US20090081837A1
Electricity

Method for fabricating a semiconductor device having an extended stress liner

#12 | 2009-03-26
US20090078991A1
Electricity

Stress enhanced semiconductor device and methods for fabricating same

#13 | 2009-03-05
US20090057729A1
Electricity

Semiconductor device and methods for fabricating same

#14 | 2008-05-01
US20080104550A1
Physics

Compensating for layout dimension effects in semiconductor device modeling

#15 | 2008-04-10
US20080085570A1
Electricity

Distinguishing between dopant and line width variation components

#16 | 2007-12-27
US20070298524A1
Electricity

Methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing same

#17 | 2007-02-13
US10790939
-

Bi-modal halo implantation

#18 | 2007-02-01
US20070026599A1
Electricity

Methods for fabricating a stressed MOS device

#19 | 2005-12-27
US10759171
-

Method of forming miniaturized polycrystalline silicon gate electrodes using selective oxidation

#20 | 2005-07-26
US10700557
-

Method for improving MOS mobility

#21 | 2005-03-08
US10085903
-

SOI MOSFET junction degradation using multiple buried amorphous layers

InventorID:

193090 ⎘