Inventor profile of:

Neil Mclellan

City:

Toronto

Country:

Canada

Published Applications:

19

Last publication date:

2013-04-18

Top Assignees for applications by Neil Mclellan

The entities that hold a legal rights for patent applications filed by inventor Mclellan Neil:

Recent patent applications by Mclellan Neil

Neil Mclellan from Toronto, CA has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2013-04-18
US20130095614A1
Electricity

Wafer level packaging of semiconductor chips

#2 | 2012-09-27
US20120241985A1
Electricity

Method of fabricating a semiconductor chip with supportive terminal pad

#3 | 2012-05-17
US20120120615A1
Electricity

CIRCUIT BOARD WITH VIA TRACE CONNECTION AND METHOD OF MAKING THE SAME

#4 | 2012-01-19
US20120012987A1
Electricity

Methods of forming semiconductor chip underfill anchors

#5 | 2011-09-15
US20110221065A1
Electricity

Methods of forming semiconductor chip underfill anchors

#6 | 2011-06-23
US20110147061A1
Electricity

Circuit board with via trace connection and method of making the same

#7 | 2011-06-09
US20110133338A1
Electricity

Conductor bump method and apparatus

#8 | 2011-03-31
US20110074041A1
Electricity

Circuit board with oval micro via

#9 | 2011-03-03
US20110049725A1
Electricity

Semiconductor chip with contoured solder structure opening

#10 | 2010-12-23
US20100320599A1
Electricity

Die stacking apparatus and method

#11 | 2010-10-21
US20100265682A1
Electricity

Semiconductor chip package with undermount passive devices

#12 | 2010-01-28
US20100019347A1
Electricity

Under bump metallization for on-die capacitor

#13 | 2009-03-05
US20090057887A1
Electricity

Wafer level packaging of semiconductor chips

#14 | 2009-02-05
US20090032971A1
Electricity

Die stacking apparatus and method

#15 | 2009-02-05
US20090032941A1
Electricity

Under Bump Routing Layer Method and Apparatus

#16 | 2009-02-05
US20090032940A1
Electricity

Conductor bump method and apparatus

#17 | 2008-10-09
US20080245555A1
Electricity

CIRCUIT SUBSTRATE WITH PLATED THROUGH HOLE STRUCTURE AND METHOD

#18 | 2008-05-01
US20080099910A1
Electricity

Flip-Chip Semiconductor Package with Encapsulant Retaining Structure and Strip

#19 | 2008-03-06
US20080057625A1
Electricity

Method and apparatus for making semiconductor packages

InventorID:

197922 ⎘