Thomas Kuenemund

Master-slave D flip-flop

Integrated circuit

INTEGRATED CIRCUIT

Chip and method for manufacturing a chip

Storage element with clock gating

Physically obfuscated circuit

Semiconductor chip state detector

Integrated electronic circuit

Chip with circuit for detecting an attack on the chip

Delay circuit

Chip with circuit for detecting an attack on the chip

Physical uncloneable function circuit

Semiconductor chip

Programmable logic circuit and method for implementing a boolean function

Circuit and method for checking the integrity of a control signal

Digital circuit and method for manufacturing a digital circuit

Zero detection circuit and masked boolean or circuit

Method for manufacturing a digital circuit and digital circuit

Method for manufacturing a digital circuit and digital circuit

Semiconductor chip using logic circuitry including complementary FETs for reverse engineering protection

Chip and method for operating a processing circuit

Cryptographic processor, method for implementing a cryptographic processor and key generation circuit

Method for accessing a memory and memory access circuit

Semiconductor chip having a circuit with cross-coupled transistors to thwart reverse engineering

Chip and method for manufacturing a chip

Method for manufacturing a digital circuit and digital circuit

Method for manufacturing a digital circuit and digital circuit

Memory arrangement and method for detecting an attack on a memory arrangement

Chip and method for detecting an attack on a chip

Chip and method for detecting an attack on a chip

Circuit arrangement and method for safeguarding a circuit arrangement with respect to repeated light attacks

Method and data processing device for reconstructing a vector

Circuit arrangement for preventing high current flow during energy-saving mode

Semiconductor component and an operating method for a protective circuit against light attacks

Electronic transmission element

Storage circuit

Circuit

Apparatus and method for reconstructing a bit sequence with preliminary correction

Bit error correction for removing age related errors in a bit pattern

Semiconductor component and an operating method for a protective circuit against light attacks

Device with a data retention mode and a data processing mode

Identification circuit and method for generating an identification bit

Integrated circuit with a radiation-sensitive thyristor structure

STANDARD CELL FOR ARITHMETIC LOGIC UNIT AND CHIP CARD CONTROLLER

Storage circuit with fault detection and method for operating the same

Logic gate

Digital fault detection circuit and method

Macrocell and method for adding

Memory for storing a binary state

Masked memory cells

Method and apparatus for operating maskable memory cells

Device for storing a binary state

Apparatus and method for reducing leakage currents of integrated circuits having at least one transistor

Standard cell for arithmetic logic unit and chip card controller

Method and device for protected transmission of data words

Standard cell for arithmetic logic unit and chip card controller

Apparatus and method for reducing the leakage current of memory cells in the energy-saving mode

Circuit arrangement and method for recognizing manipulation attempts

Transmission device