Inventor profile of:

Marc Hoffman

City:

Mansfield, Massachusetts

Country:

United States

Published Applications:

17

Last publication date:

2024-03-28

Top Assignees for applications by Marc Hoffman

The entities that hold a legal rights for patent applications filed by inventor Hoffman Marc:

Recent patent applications by Hoffman Marc

Marc Hoffman from Mansfield, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-03-28
US20240104356A1
Physics

QUANTIZED NEURAL NETWORK ARCHITECTURE

#2 | 2023-11-02
US20230351144A1
Physics

Instruction Set Architecture for Implementing Linear Activation Functions in Neural Networks

#3 | 2023-11-02
US20230350678A1
Physics

Instruction set architecture for neural network quantization and packing

#4 | 2023-11-02
US20230350640A1
Physics

SYSTEM AND METHOD OF ROTATING VECTOR INPUT

#5 | 2023-03-30
US20230102798A1
Physics

INSTRUCTION APPLICABLE TO RADIX-3 BUTTERFLY COMPUTATION

#6 | 2023-03-30
US20230102564A1
Physics

Permutation instruction

#7 | 2023-03-30
US20230097103A1
Physics

FAST FOURIER TRANSFORM USING PHASOR TABLE

#8 | 2018-02-01
US20180032311A1
Physics

System and method for piecewise linear approximation

#9 | 2009-01-15
US20090016634A1
Electricity

Half pixel interpolator for video motion estimation accelerator

#10 | 2007-08-09
US20070183504A1
Electricity

Motion estimation using prediction guided decimated search

#11 | 2007-07-12
US20070160288A1
Electricity

Randomly sub-sampled partition voting (RSVP) algorithm for scene change detection

#12 | 2006-09-19
US9570108
-

Digital signal processor computation core with input operand selection from operand bus for dual operations

#13 | 2006-09-12
US9570847
-

Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units

#14 | 2006-06-13
US9630258
-

Method for efficiently computing a fast fourier transform

#15 | 2006-01-10
US9738649
-

Single-step processing and selecting debugging modes

#16 | 2005-05-24
US10639020
-

Multi-tiered memory bank having different data buffer sizes with a programmable bank select

#17 | 2005-02-22
US9570213
-

Digital signal processor computation core with pipeline having memory access stages and multiply accumulate stages positioned for efficient operation

InventorID:

2106318 ⎘