Inventor profile of:

Jose P. Allarey

City:

Davis, California

Country:

United States

Published Applications:

13

Last publication date:

2016-05-19

Top Assignees for applications by Jose P. Allarey

The entities that hold a legal rights for patent applications filed by inventor Allarey Jose P.:

Recent patent applications by Allarey Jose P.

Jose P. Allarey from Davis, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2016-05-19
US20160140081A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor

#2 | 2015-09-10
US20150253833A1
Physics

Methods and apparatus to improve turbo performance for events handling

#3 | 2014-04-17
US20140108849A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor

#4 | 2014-01-30
US20140032950A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor

#5 | 2013-07-18
US20130185577A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor

#6 | 2013-07-11
US20130179639A1
Physics

Technique for preserving cached information during a low power mode

#7 | 2013-04-25
US20130103928A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor

#8 | 2011-09-29
US20110238974A1
Physics

Methods and apparatus to improve turbo performance for events handling

#9 | 2011-09-29
US20110238973A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessor

#10 | 2011-06-23
US20110154081A1
Physics

Dynamic power reduction

#11 | 2011-06-09
US20110138388A1
Physics

Methods and apparatuses to improve turbo performance for events handling

#12 | 2009-05-21
US20090132844A1
Physics

Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor

#13 | 2008-10-02
US20080244294A1
Physics

Dynamic power reduction

InventorID:

214034 ⎘