Mohan J. Kumar

TECHNIQUES TO CONTROL SYSTEM UPDATES AND CONFIGURATION CHANGES VIA THE CLOUD

CLOUD-BASED SCALE-UP SYSTEM COMPOSITION

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

TECHNOLOGIES TO UPDATE FIRMWARE AND MICROCODE

DATA LINE (DQ) SPARING WITH ADAPTIVE ERROR CORRECTION CODING (ECC) MODE SWITCHING

TECHNOLOGIES FOR PROVIDING EFFICIENT POOLING FOR A HYPER CONVERGED INFRASTRUCTURE

Techniques to control system updates and configuration changes via the cloud

Cloud-based scale-up system composition

CLOUD SERVICE MESH PERFORMANCE TUNING

Apparatus and method for detecting and recovering from data fetch errors

SOFTWARE-DEFINED MODULAR ENERGY SYSTEM DESIGN AND OPERATION

CLUSTER WIDE REBUILD REDUCTION AGAINST STORAGE NODE FAILURES

RELIABILITY AVAILABILITY SERVICEABILITY (RAS) SERVICE FRAMEWORK

Out-of-band management of FPGA bitstreams

TECHNOLOGIES FOR PROVIDING MANIFEST-BASED ASSET REPRESENTATION

Techniques to configure physical compute resources for workloads via circuit switching

CONTROL AND CONFIGURATION OF SOFTWARE-DEFINED MACHINES

METHOD DEVICE AND SYSTEM FOR UPGRADABLE MICROCODE (UCODE) LOADING AND ACTIVATION IN RUNTIME FOR BARE METAL DEPLOYMENT

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

Interface and warm reset path for memory device firmware upgrades

APPARATUS AND METHOD FOR DETECTING AND RECOVERING FROM DATA FETCH ERRORS

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

Function as a service (FaaS) system enhancements

Cloud-based scale-up system composition

DEVICE, SYSTEM AND METHOD TO IDENTIFY A SOURCE OF DATA POISONING

SECURE AND EFFICIENT MICROCODE(UCODE) HOT-UPGRADE FOR BARE METAL CLOUD

Memory device firmware update and activation without memory access quiescence

Technologies for lifecycle management with remote firmware

Technologies for load balancing a network

MEMORY DEVICE FIRMWARE UPDATE AND ACTIVATION WITH MEMORY ACCESS QUIESCENCE

Microcode(uCode) hot-upgrade method for bare metal cloud deployment

TECHNOLOGIES FOR MANAGING DISAGGREGATED RESOURCES IN A DATA CENTER

Update of boot code handlers

Networked shuffle storage

DEVICE, SYSTEM AND METHOD TO IDENTIFY A SOURCE OF DATA POISONING

TECHNOLOGIES FOR ENABLING AND METERING THE UTILIZATION OF FEATURES ON DEMAND

Modular microcode (uCode) patch method to support runtime persistent update

Technologies for fast booting with error-correcting code memory

Techniques for handling errors in persistent memory

Techniques to verify and authenticate resources in a data center computer environment

Cloud-based scale-up system composition

Apparatus and method for detecting and recovering from data fetch errors

Method and apparatus for dynamically allocating storage resources to compute nodes

Technologies for providing latency-aware consensus management in a disaggregated architecture

MECHANISM FOR DISAGGREGATED STORAGE CLASS MEMORY OVER FABRIC

Read from memory instructions, processors, methods, and systems, that do not take exception on defective data

Technologies for secure and efficient native code invocation for firmware services

Runtime firmware activation for memory devices

Apparatus and method for implementing a multi-level memory hierarchy

Protected runtime mode

Out-of-band management of FPGA bitstreams

MECHANISMS FOR FPGA CHAINING AND UNIFIED FPGA VIEWS TO COMPOSED SYSTEM HOSTS

MANAGEMENT CONTROLLER-BASED SOLUTION FOR PROCESSOR RAS IN SMI-FREE ENVIRONMENT

Unified hardware and software two-level memory

Techniques for processor boot-up

Technologies for providing efficient pooling for a hyper converged infrastructure

Technologies for composing a managed node based on telemetry data

TECHNOLOGIES FOR AUTOMATED NETWORK CONGESTION MANAGEMENT

TECHNOLOGIES FOR LOCAL DISAGGREGATION OF MEMORY

TECHNOLOGIES FOR MIGRATING VIRTUAL MACHINES

Technologies for efficiently booting sleds in a disaggregated architecture

Technologies for configuration-free platform firmware

Technologies for load balancing a network

NON VOLATILE MEMORY MODULE FOR RACK IMPLEMENTATIONS

Object storage system with multi-level hashing function for storage address determination

TECHNOLOGIES FOR PROVIDING EFFICIENT SCHEDULING OF FUNCTIONS

Technologies for providing runtime code in an option ROM

Distributed storage location hinting for non-volatile memories

Technologies for dividing memory across socket partitions

METHOD OF IMPROVED DATA DISTRIBUTION AMONG STORAGE DEVICES

Scrubbing disaggregated storage

Non-volatile memory express over fabric (NVMeOF) using volume management device

Trusted platform telemetry mechanisms inaccessible to software

STORAGE DYNAMIC ACCESSIBILITY MECHANISM METHOD AND APPARATUS

THROTTLING, SUB-NODE COMPOSITION, AND BALANCED PROCESSING IN RACK SCALE ARCHITECTURE

CONTROLLER CONSOLIDATION, USER MODE, AND HOOKS IN RACK SCALE ARCHITECTURE

Apparatus and method for system physical address to memory module address translation

TECHNOLOGIES FOR VERIFYING AUTHORIZED OPERATION OF SERVERS

Technologies for pooling accelerator over fabric

Mechanisms for SAS-free cabling in rack scale design

Unified hardware and software two-level memory

Self-morphing server platforms

Mechanism for providing reconfigurable data tiers in a rack scale environment

Systems and method for dynamic address based mirroring

System and method to increase availability in a multi-level memory configuration

Instruction and logic for flushing memory ranges in a distributed shared memory system

Instruction and logic to expose error domain topology to facilitate failure isolation in a processor

DYNAMICALLY COMPOSED NETWORK RESOURCES METHOD AND APPARATUS

Method and apparatus for dynamically allocating storage resources to compute nodes

Technologies for providing manifest-based asset representation

Technologies for lifecycle management with remote firmware

Providing State Storage in a Processor for System Management Mode

Enhanced system sleep state support in servers using non-volatile random access memory

Accessing memory coupled to a target node from an initiator node

System for selectively upgradeable disaggregated server components

Mechanism for disaggregated storage class memory over fabric

Techniques for handling errors in persistent memory

Mechanism for efficient discovery of storage resources in a rack scale architecture system

TECHNIQUES TO ALLOCATE REGIONS OF A MULTI-LEVEL, MULTI-TECHNOLOGY SYSTEM MEMORY TO APPROPRIATE MEMORY ACCESS INITIATORS

High performance persistent memory