Newark, California
United States
22
2026-06-25
The entities that hold a legal rights for patent applications filed by inventor Peng Yi:
Yi Peng from Newark, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Systems and Methods for Protocol Decoders in a Signal Analysis System Using Hardware Description Language
#2 | 2026-05-14Circuit Design Visibility in Integrated Circuit Devices
#3 | 2026-04-30Circuits And Methods For Correcting Errors In Memory
#4 | 2025-10-16Networks-On-Chip For Configuration And Emulation Of Integrated Circuits
#5 | 2025-08-28Systems and Methods for Dynamically Adjusting Clock Skips to Mitigate Voltage Droop
#6 | 2025-01-02APPARATUS AND METHOD FOR GRACEFUL DEGRADATION OF REDUNDANT PROCESSING
#7 | 2024-09-12CIRCUIT DESIGN VISIBILITY IN INTEGRATED CIRCUIT DEVICES
#8 | 2024-04-18Intelligent Suggestions for CAD-Based Design Entry
#9 | 2023-07-06Techniques For Capturing Signals From Logic Circuits At A Logic Analyzer
#10 | 2023-04-06Circuit Implementation on Processing Circuitry
#11 | 2022-10-20SYSTEMS AND METHODS FOR PROGRAMMABLE FABRIC DESIGN COMPILATION
#12 | 2022-03-10Circuits And Methods For Accessing Signals In Integrated Circuits
#13 | 2022-03-10Circuits And Methods For Correcting Errors In Memory
#14 | 2021-05-20Non-destructive readback and writeback for integrated circuit device
#15 | 2021-01-14Circuit design visibility in integrated circuit devices
#16 | 2019-10-15Sharing a JTAG interface among multiple partitions
#17 | 2019-08-27Initial condition support for partial reconfiguration
#18 | 2018-10-16Sharing a JTAG interface among multiple partitions
#19 | 2018-03-22Integrated circuits having expandable processor memory
#20 | 2017-02-28Partial reconfiguration control interface for integrated circuits
#21 | 2016-03-29Debugging an optimized design implemented in a device with a pre-optimized design simulation
#22 | 2015-12-01Reconfigurable logic analyzer circuitry
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