Kumar Deepak

Method and system providing visualization of sub-circuit iterations based on handshake signals

Transaction associations in waveform displays

Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit

Kernel tracing for a heterogeneous computing platform and data mining

Framework for reusing cores in simulation

Data unit breakpointing circuits and methods

Scheduling events in hardware design language simulation

Implementation and evaluation of designs for heterogeneous computing platforms with hardware acceleration

Mixed-language simulation

Debugging system and method

Debugging system and method

Device profiling for tuning OpenCL applications on programmable integrated circuits

System and method for debugging software executed as a hardware simulation

Performance and memory efficient modeling of HDL ports for simulation

Verification and debugging using heterogeneous simulation models

Mixed-language simulation

Scheduling processes in simulation of a circuit design based on simulation costs and runtime states of HDL processes

Compilation and simulation of a circuit design

Scheduling processes in simulation of a circuit design

Compilation and simulation of a circuit design

Generating a simulation model of a circuit design

Simulation and emulation of a circuit design

Securing circuit designs within circuit design tools

Event-driven simulation of IP using third party event-driven simulators

Dangling reference detection and garbage collection during hardware simulation

Accelerated event queue for logic simulation

Atomic transaction processing for logic simulation

Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions

Method and apparatus for processing a circuit description for logic simulation