Inventor profile of:

Abhishek Dube

City:

Fishkill, New York

Country:

United States

Published Applications:

23

Last publication date:

2014-07-24

Top Assignees for applications by Abhishek Dube

The entities that hold a legal rights for patent applications filed by inventor Dube Abhishek:

Recent patent applications by Dube Abhishek

Abhishek Dube from Fishkill, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-07-24
US20140203363A1
Electricity

Extremely Thin Semiconductor-On-Insulator Field-Effect Transistor With An Epitaxial Source And Drain Having A Low External Resistance

#2 | 2014-07-24
US20140203361A1
Electricity

EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR FIELD-EFFECT TRANSISTOR WITH AN EPITAXIAL SOURCE AND DRAIN HAVING A LOW EXTERNAL RESISTANCE

#3 | 2013-07-11
US20130175547A1
Electricity

Field effect transistor device

#4 | 2013-07-04
US20130168736A1
Electricity

Method for growing conformal EPI layers and structure thereof

#5 | 2013-06-27
US20130161759A1
Electricity

Method for growing strain-inducing materials in CMOS circuits in a gate first flow

#6 | 2013-01-10
US20130009211A1
Electricity

SILICON GERMANIUM FILM FORMATION METHOD AND STRUCTURE

#7 | 2012-12-20
US20120319110A1
Electricity

Semiconductor structure having test and transistor structures

#8 | 2012-11-08
US20120280251A1
Electricity

Cavity-free interface between extension regions and embedded silicon-carbon alloy source/drain regions

#9 | 2012-10-18
US20120261717A1
Electricity

Monolayer dopant embedded stressor for advanced CMOS

#10 | 2012-10-04
US20120248436A1
Electricity

Reduced pattern loading for doped epitaxial process and semiconductor structure

#11 | 2012-08-16
US20120205749A1
Electricity

Silicon germanium film formation method and structure

#12 | 2012-05-10
US20120112208A1
Electricity

Stressed transistor with improved metastability

#13 | 2012-05-08
US13004201
-

Process for epitaxially growing epitaxial material regions

#14 | 2012-05-03
US20120104507A1
Electricity

Method for growing strain-inducing materials in CMOS circuits in a gate first flow

#15 | 2012-03-22
US20120068193A1
Electricity

Structure and method for increasing strain in a device

#16 | 2012-02-23
US20120043556A1
Electricity

Epitaxial growth of silicon doped with carbon and phosphorus using hydrogen carrier gas

#17 | 2011-12-29
US20110316046A1
Electricity

Field effect transistor device

#18 | 2011-12-29
US20110316044A1
Electricity

Delta monolayer dopants epitaxy for embedded source/drain silicide

#19 | 2011-10-27
US20110260213A1
Electricity

Monolayer dopant embedded stressor for advanced CMOS

#20 | 2010-04-15
US20100090288A1
Electricity

Method of forming source and drain of a field-effect-transistor and structure thereof

#21 | 2010-02-11
US20100035419A1
Electricity

Pattern independent Si:C selective epitaxy

#22 | 2009-10-29
US20090269926A1
Electricity

POLYGRAIN ENGINEERING BY ADDING IMPURITIES IN THE GAS PHASE DURING CHEMICAL VAPOR DEPOSITION OF POLYSILICON

#23 | 2009-10-29
US20090267118A1
Electricity

METHOD FOR FORMING CARBON SILICON ALLOY (CSA) AND STRUCTURES THEREOF

InventorID:

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