Andreas Ott

Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects

Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects

TMAH RECESS FOR SILICON GERMANIUM IN POSITIVE CHANNEL REGION FOR CMOS DEVICE

Prevention of ILD Loss in Replacement Gate Technologies by Surface Treatmen

Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter

Protection of reactive metal surfaces of semiconductor devices during shipping by providing an additional protection layer

Embedded sigma-shaped semiconductor alloys formed in transistors by applying a uniform oxide layer prior to cavity etching

Superior fill conditions in a replacement gate approach by corner rounding prior to completely removing a placeholder material

Forming semiconductor resistors in a semiconductor device comprising metal gates by increasing etch resistivity of the resistors

Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities

Transistor with embedded Si/Ge material having reduced offset to the channel region

Reducing copper defects during a wet chemical cleaning of exposed copper surfaces in a metallization layer of a semiconductor device

Method of forming CMOS device having gate insulation layers of different type and thickness