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Inventor profile of:

Nathan Ip

City:

Austin, Texas

Country:

United States

Published Applications:

Last publication date:

2025-01-23

Top Assignees for applications by Nathan Ip

The entities that hold a legal rights for patent applications filed by inventor Ip Nathan:

TOKYO ELECTRON LIMITED 11 Tokyo, Japan

Recent patent applications by Ip Nathan

Nathan Ip from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-01-23

US20250029847A1

Electricity

INTEGRATED METROLOGY FOR PROCESS CONTROLS IN WAFER BONDING SYSTEM

#2 | 2024-07-25

US20240250059A1

Electricity

COMPLIANT CHUCK EDGE RING

#3 | 2024-02-22

US20240063022A1

Electricity

WAFER BONDING PROCESS WITH REDUCED OVERLAY DISTORTION

#4 | 2023-07-27

US20230234188A1

Performing operations; transporting

WAFER CHUCK WITH TUNABLE STIFFNESS MATERIAL

#5 | 2023-03-30

US20230102438A1

Physics

Method and process using fingerprint based semiconductor manufacturing process fault detection

#6 | 2022-10-27

US20220344179A1

Electricity

Wafer bonding apparatus and methods to reduce post-bond wafer distortion

#7 | 2022-08-18

US20220262631A1

Electricity

Plasma processing method and plasma processing apparatus

#8 | 2022-01-13

US20220013416A1

Electricity

Apparatus and methods for wafer to wafer bonding

#9 | 2020-04-30

US20200135592A1

Electricity

Systems and methods for manufacturing microelectronic devices

#10 | 2019-05-09

US20190139798A1

Electricity

Enhancement of yield of functional microelectronic devices

#11 | 2019-05-09

US20190137565A1

Physics

Enhancement of yield of functional microelectronic devices

#12 | 2018-11-29

US20180342410A1

Electricity

Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer

InventorID:

2360626 ⎘