SIMON C. STEELY

Interruptible and restartable matrix multiplication instructions, processors, methods, and systems

Apparatuses, methods, and systems for operations in a configurable spatial accelerator

Apparatuses, methods, and systems for memory interface circuit allocation in a configurable spatial accelerator

Memory circuits and methods for distributed memory hazard detection and error recovery

Apparatus, methods, and systems with a configurable spatial accelerator

Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator

Processors and methods for privileged configuration in a spatial array

Processors and methods for pipelined runtime services in a spatial array

Update mask for handling interaction between fills and updates

ADAPTIVE CONTROL OF MULTIPLE PREFETCHERS

Dynamic quality of service (QoS) for a shared cache

Technique for allocating cache line ownership

Replacement in non-uniform access cache structure

Locked cache line sharing

Managing a multi-way associative cache

System and method to facilitate ordering point migration

System and method for conflict responses in a cache coherency protocol

System and method for providing parallel data requests

System and method for updating owner predictors

System and method for blocking data responses

System and method for conflict responses in a cache coherency protocol with ordering point migration

System and method for creating ordering points

System and method for read migratory optimization in a cache coherency protocol

System and method for non-migratory requests in a cache coherency protocol

System and method to facilitate ordering point migration to memory

System and method for conflict responses in a cache coherency protocol with ordering point migration

Cache coherency protocol with ordering points

System and method for responses between different cache coherency protocols

System and method for resolving transactions in a cache coherency protocol

Transaction references for requests in a multi-processor network

Systems and methods for executing across at least one memory barrier employing speculative fills

Multi-processor systems and methods for backup for non-coherent speculative fills

Multi-processor system utilizing concurrent speculative source request and system source request in response to cache miss

Multi-processor system receiving input from a pre-fetch buffer

Register file systems and methods for employing speculative fills

Cache systems and methods for employing speculative fills

Coherent signal in a multi-processor system

Consistency evaluation of program execution across at least one memory barrier

Source request arbitration

Systems and methods for employing speculative fills