Inventor profile of:

Scott McGrath

City:

Scotts Valley, California

Country:

United States

Published Applications:

19

Last publication date:

2017-05-18

Top Assignees for applications by Scott McGrath

The entities that hold a legal rights for patent applications filed by inventor McGrath Scott:

Recent patent applications by McGrath Scott

Scott McGrath from Scotts Valley, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2017-05-18
US20170141020A1
Electricity

Stiffened wires for offset BVA

#2 | 2017-02-09
US20170040270A1
Electricity

Methods and structures to repair device warpage

#3 | 2017-01-19
US20170018529A1
Electricity

Flipped die stack

#4 | 2016-04-14
US20160104689A1
Electricity

Semiconductor die mount by conformal die coating

#5 | 2016-01-28
US20160027761A1
Electricity

Electrical connector between die pad and z-interconnect for stacked die assemblies

#6 | 2014-07-31
US20140213020A1
Electricity

Semiconductor die mount by conformal die coating

#7 | 2013-05-16
US20130119117A1
Electricity

BONDING WEDGE

#8 | 2012-05-17
US20120119385A1
Electricity

Electrical connector between die pad and z-interconnect for stacked die assemblies

#9 | 2011-11-10
US20110272825A1
Electricity

Stacked die assembly having reduced stress electrical interconnects

#10 | 2011-06-23
US20110147943A1
Electricity

Wafer level surface passivation of stackable integrated circuit chips

#11 | 2011-02-17
US20110037159A1
Electricity

Electrically interconnected stacked die assemblies

#12 | 2010-06-10
US20100140811A1
Electricity

SEMICONDUCTOR DIE INTERCONNECT FORMED BY AEROSOL APPLICATION OF ELECTRICALLY CONDUCTIVE MATERIAL

#13 | 2009-04-23
US20090102038A1
Electricity

CHIP SCALE STACKED DIE PACKAGE

#14 | 2009-03-12
US20090068790A1
Electricity

Electrical Interconnect Formed by Pulsed Dispense

#15 | 2009-03-12
US20090065916A1
Electricity

Semiconductor die mount by conformal die coating

#16 | 2008-12-25
US20080315434A1
Electricity

Wafer level surface passivation of stackable integrated circuit chips

#17 | 2008-12-25
US20080315407A1
Physics

THREE-DIMENSIONAL CIRCUITRY FORMED ON INTEGRATED CIRCUIT DEVICE USING TWO-DIMENSIONAL FABRICATION

#18 | 2008-12-11
US20080303131A1
Electricity

Electrically interconnected stacked die assemblies

#19 | 2008-09-18
US20080224279A1
Electricity

Vertical electrical interconnect formed on support prior to die mount

InventorID:

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