Georg Tempel

SEMICONDUCTOR SUBSTRATE ARRANGEMENT, A SEMICONDUCTOR DEVICE, AND A METHOD FOR PROCESSING A SEMICONDUCTOR SUBSTRATE

Method and device for evaluating a chip manufacturing process

Chip and method for identifying a chip

Method and device for evaluating a chip manufacturing process

Semiconductor device and method of making same

Nonvolatile memory element and production method thereof and storage memory arrangement

Method of making semiconductor device

Nonvolatile memory element and production method thereof and storage memory arrangement

Semiconductor component with trench isolation and corresponding production method

Bit line structure and method for the production thereof

Non-volatile two transistor semiconductor memory cell and method for producing the same

Method of making discrete trap memory (DTM) mediated by fullerenes

Semiconductor device and method of making same

Discrete Trap Memory (DTM) Mediated by Fullerenes

Nonvolatile memory element and production method thereof and storage memory arrangement

Non-volatile two-transistor semiconductor memory cell and method for producing the same

Non-volatile memory cell array

Bit line structure and method of fabrication

Method of forming a charge-trapping memory device

Detector arrangement, method for the detection of electrical charge carriers and use of an ONO field effect transistor for detection of an electrical charge

Non-volatile semiconductor memory element and corresponding production and operation method

Bit line structure and production method thereof

Non-volatile two transistor semiconductor memory cell and method for producing the same

Bit line structure and method for the production thereof

Semiconductor component with trench insulation and corresponding production method

Non-volatile memory element and production method thereof and storage memory arrangement

Method for production of charge-trapping memory devices

Integrated memory circuit arrangement

Bitline structure and method for production thereof

Polymer for sealing porous materials during chip production

Non-volatile two-transistor semiconductor memory cell and method for producing the same

Non-volatile two transistor semiconductor memory cell and method for producing the same

Method for operating a memory cell array

Process for sealing plasma-damaged, porous low-k materials