Wilsele
Belgium
54
2026-06-18
Boon Teik Chan from Wilsele, BE has applied for patents for these inventions. The list has both pending applications and granted patents:
Method for Forming a Semiconductor Device
#2 | 2026-04-23Co-integrated Semiconductor Structure, and a Method for Manufacturing a Co-integrated Semiconductor Structure
#3 | 2025-11-13Method for Contacting the Gates of a Spin Qubit Gate Array
#4 | 2025-10-02SEMICONDUCTOR DEVICES INCLUDING PIN DIODES AND METHODS OF FORMING THE SAME
#5 | 2025-06-26METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE
#6 | 2025-06-26Method for Forming a Semiconductor Structure
#7 | 2025-04-24Method for Processing a CFET Device with Non-conformal Gate Dielectric
#8 | 2025-04-03COMPLEMENTARY FIELD EFFECT TRANSISTOR DEVICES AND METHODS OF PROCESSING THE SAME
#9 | 2025-03-27Method for Forming a Self-aligned Buried Power Rail in a Nanosheet-based Transistor Device
#10 | 2025-03-13Semiconductor Device and a Method for Forming a Semiconductor Device
#11 | 2024-11-07HIGH PERFORMANCE AND LOW POWER THREE-DIMENSIONAL STATIC RANDOM ACCESS MEMORY AND METHOD OF FORMING SAME
#12 | 2024-08-29INTEGRATED CIRCUIT CHIPS COMPRISING FORKSHEET DEVICES CONNECTED WITH BURIED POWER RAILS
#13 | 2024-07-11METHOD FOR INTERCONNECTING A BURIED WIRING LINE AND A SOURCE/DRAIN BODY
#14 | 2024-06-27Integrated Circuit Devices and Methods for Making Such Devices
#15 | 2024-06-20Stacked SRAM Cell with a Dual-Side Interconnect Structure
#16 | 2024-06-20Method for Forming a Semiconductor Device
#17 | 2024-06-20METHOD FOR FORMING A SEMICONDUCTOR DEVICE
#18 | 2024-06-20METHOD FOR FORMING A SEMICONDUCTOR DEVICE
#19 | 2024-05-09METHOD FOR FORMING A SEMICONDUCTOR DEVICE
#20 | 2024-04-25METHOD FOR INTERCONNECTING A BURIED WIRING LINE AND A SOURCE/DRAIN BODY
#21 | 2024-01-04Method for forming a buried metal line in a semiconductor substrate
#22 | 2023-12-21Bit Cell with Isolating Wall
#23 | 2023-12-21Bit Cell for Static Random Access Memory
#24 | 2023-11-30Method for Forming a Stacked Transistor Device
#25 | 2023-11-09Circuit cell for a standard cell semiconductor device
#26 | 2023-06-22Method for Forming a Semiconductor Device
#27 | 2023-06-22Method for Forming a Stacked FET Device
#28 | 2023-06-22Method for Forming a Stacked FET Device
#29 | 2023-06-22VIA FORMATION IN AN INTEGRATED CIRCUIT
#30 | 2023-06-22Method for Forming a Semiconductor Device Structure
#31 | 2023-06-22Method for Forming a Semiconductor Device
#32 | 2023-06-08METHOD FOR FORMING A FET DEVICE
#33 | 2023-06-08METHOD FOR FORMING A FET DEVICE
#34 | 2023-06-08METHOD FOR FORMING A FET DEVICE
#35 | 2022-06-23FET device and a method for forming a FET device
#36 | 2022-04-21Method for forming a semiconductor device and a semiconductor device
#37 | 2022-03-24Method for forming a semiconductor device
#38 | 2022-03-17Gate spacer patterning
#39 | 2022-03-03Method for forming transistor structures
#40 | 2021-12-16Method for processing a semiconductor device with two closely spaced gates
#41 | 2021-09-30Method for processing a FinFET device
#42 | 2021-09-23Method for filling a space in a semiconductor
#43 | 2021-06-24Methods of semiconductor device processing
#44 | 2021-06-10Isolated semiconductor layer stacks for a semiconductor device
#45 | 2021-04-29Method for producing self-aligned gate and source/drain via connections for contacting a FET transistor
#46 | 2021-04-22Split replacement metal gate integration
#47 | 2021-03-04Contact isolation in semiconductor devices
#48 | 2021-02-04Method for forming a buried metal line
#49 | 2021-01-28Method for Forming a Buried Metal Line in a Semiconductor Substrate
#50 | 2021-01-21Self-aligned layer patterning
#51 | 2020-10-15Method of forming a mask layer
#52 | 2020-05-28Method of fabricating stacked semiconductor device
#53 | 2020-05-07Removing an organic sacrificial material from a two-dimensional material
#54 | 2020-04-09PROCESS OF FORMING A GATE OF A SEMICONDUCTOR DEVICE
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