San Jose, California
United States
37
2017-04-27
The entities that hold a legal rights for patent applications filed by inventor Phatak Prashant:
Prashant Phatak from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:
DRAM Capacitors and Methods for Forming the Same
#2 | 2017-04-13Selector Elements
#3 | 2017-03-23Storage Capacitors for Displays and Methods for Forming the Same
#4 | 2015-05-28Resistive-switching memory elements having improved switching characteristics
#5 | 2015-03-10Resistive-switching memory elements having improved switching characteristics
#6 | 2013-10-17ALD processing techniques for forming non-volatile resistive switching memories
#7 | 2013-06-06Resistive-switching memory element
#8 | 2012-12-13Surface treatment to improve resistive-switching characteristics
#9 | 2012-12-06RESISTIVE SWITCHING MEMORY DEVICE
#10 | 2012-11-15Confinement techniques for non-volatile resistive-switching memories
#11 | 2012-10-30Resistive-switching memory element
#12 | 2012-10-11Closed loop sputtering controlled to enhance electrical characteristics in deposited layer
#13 | 2012-08-16Resistive switching memory element including doped silicon electrode
#14 | 2012-06-14Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
#15 | 2012-04-12Method of forming non-volatile resistive-switching memories
#16 | 2012-02-23Bipolar resistive-switching memory with a single diode per memory cell
#17 | 2012-02-09Surface treatment to improve resistive-switching characteristics
#18 | 2012-02-02Variable resistance memory with a select device
#19 | 2012-01-05Stress-engineered resistance-change memory device
#20 | 2011-12-06Biploar resistive-switching memory with a single diode per memory cell
#21 | 2011-11-03ALD processing techniques for forming non-volatile resistive-switching memories
#22 | 2011-11-01Stress-engineered resistance-change memory device
#23 | 2011-10-13Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
#24 | 2011-08-25Confinement techniques for non-volatile resistive-switching memories
#25 | 2011-08-25Non-volatile resistive-switching memories formed using anodization
#26 | 2011-08-25Titanium-based high-K dielectric films
#27 | 2010-12-30Titanium-based high-K dielectric films
#28 | 2010-10-14Resistive switching memory element including doped silicon electrode
#29 | 2010-09-30Controlled localized defect paths for resistive memories
#30 | 2010-01-07Methods of combinatorial processing for screening multiple samples on a semiconductor substrate
#31 | 2009-12-10ALD processing techniques for forming non-volatile resistive-switching memories
#32 | 2009-11-12Non-volatile resistive-switching memories formed using anodization
#33 | 2009-11-12Confinement techniques for non-volatile resistive-switching memories
#34 | 2009-11-05Closed-loop sputtering controlled to enhance electrical characteristics in deposited layer
#35 | 2009-11-05Reduction of forming voltage in semiconductor devices
#36 | 2009-11-05Surface treatment to improve resistive-switching characteristics
#37 | 2009-11-05Non-volatile resistive-switching memories
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