Inventor profile of:

Valentin Andrei

City:

San Jose, California

Country:

United States

Published Applications:

59

Last publication date:

2025-12-11

Top Assignees for applications by Valentin Andrei

The entities that hold a legal rights for patent applications filed by inventor Andrei Valentin:

Recent patent applications by Andrei Valentin

Valentin Andrei from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-12-11
US20250378045A1
Physics

DYNAMIC MEMORY RECONFIGURATION

#2 | 2025-06-26
US20250209564A1
Physics

SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE

#3 | 2025-06-19
US20250200697A1
Physics

ON CHIP DENSE MEMORY FOR TEMPORAL BUFFERING

#4 | 2025-05-29
US20250173308A1
Physics

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

#5 | 2025-05-15
US20250156371A1
Physics

DATA INITIALIZATION TECHNIQUES

#6 | 2025-05-15
US20250156222A1
Physics

SYSTEMS AND METHODS FOR SYNCHRONIZATION OF MULTI-THREAD LANES

#7 | 2025-04-10
US20250117356A1
Physics

MULTI-TILE MEMORY MANAGEMENT

#8 | 2025-03-27
US20250103548A1
Physics

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

#9 | 2025-03-27
US20250103547A1
Physics

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

#10 | 2025-03-27
US20250103546A1
Physics

CACHE STRUCTURE AND UTILIZATION

#11 | 2025-03-27
US20250103511A1
Physics

SYSTEMS AND METHODS FOR CACHE OPTIMIZATION

#12 | 2025-02-27
US20250068588A1
Physics

SCALAR CORE INTEGRATION

#13 | 2025-01-02
US20250004981A1
Physics

MULTI-TILE MEMORY MANAGEMENT

#14 | 2024-12-31
US17961833
Physics

Multi-tile memory management

#15 | 2024-12-12
US20240411717A1
Physics

CACHE STRUCTURE AND UTILIZATION

#16 | 2024-12-05
US20240403259A1
Physics

COMPRESSION TECHNIQUES

#17 | 2024-10-17
US20240345990A1
Physics

Multi-tile Memory Management for Detecting Cross Tile Access Providing Multi-Tile Inference Scaling and Providing Page Migration

#18 | 2024-08-01
US20240256483A1
Physics

Graphics processor data access and sharing

#19 | 2024-08-01
US20240256456A1
Physics

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

#20 | 2024-06-06
US20240184739A1
Physics

DYNAMIC MEMORY RECONFIGURATION

#21 | 2024-05-23
US20240169466A1
Physics

SYSTEMS AND METHODS FOR EXPLOITING QUEUES AND TRANSITIONAL STORAGE FOR IMPROVED LOW-LATENCY HIGH-BANDWIDTH ON-DIE DATA RETRIEVAL

#22 | 2024-05-16
US20240161226A1
Physics

MEMORY PREFETCHING IN MULTIPLE GPU ENVIRONMENT

#23 | 2024-03-28
US20240103910A1
Physics

Systems and methods for synchronization of multi-thread lanes

#24 | 2024-03-14
US20240086357A1
Physics

SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU CONFIGURATION

#25 | 2024-02-08
US20240045830A1
Physics

Scalar core integration

#26 | 2023-11-02
US20230351543A1
Physics

Sparse optimizations for a matrix accelerator architecture

#27 | 2023-02-16
US20230051190A1
Physics

Data prefetching for graphics data processing

#28 | 2023-01-26
US20230029176A1
Physics

Scalar core integration

#29 | 2022-11-03
US20220350751A1
Physics

Systems and methods for cache optimization

#30 | 2022-08-18
US20220261347A1
Physics

Systems and methods for improving cache efficiency and utilization

#31 | 2022-07-14
US20220222767A1
Physics

Memory prefetching in multiple GPU environment

#32 | 2022-06-09
US20220180467A1
Physics

SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU CONFIGURATION

#33 | 2022-06-09
US20220179787A1
Physics

Systems and methods for improving cache efficiency and utilization

#34 | 2022-06-02
US20220171710A1
Physics

Cache structure and utilization

#35 | 2022-05-26
US20220164917A1
Physics

Systems and methods for exploiting queues and transitional storage for improved low-latency high-bandwidth on-die data retrieval

#36 | 2022-05-19
US20220156202A1
Physics

Systems and methods for cache optimization

#37 | 2022-05-05
US20220138104A1
Physics

Cache structure and utilization

#38 | 2022-05-05
US20220138101A1
Physics

MEMORY CONTROLLER MANAGEMENT TECHNIQUES

#39 | 2022-05-05
US20220137967A1
Physics

Assistance for hardware prefetch in cache access

#40 | 2022-04-28
US20220129521A1
Physics

Systolic disaggregation within a matrix accelerator architecture

#41 | 2022-04-28
US20220129271A1
Physics

Data initialization techniques

#42 | 2022-04-28
US20220129265A1
Physics

Compression techniques

#43 | 2022-04-21
US20220121421A1
Physics

Multi-tile memory management

#44 | 2022-04-14
US20220114108A1
Physics

Systems and methods for cache optimization

#45 | 2022-04-14
US20220114096A1
Physics

Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration

#46 | 2022-03-03
US20220066931A1
Physics

Dynamic memory reconfiguration

#47 | 2022-02-24
US20220058053A1
Physics

Local memory sharing between kernels

#48 | 2021-11-11
US20210349848A1
Physics

Scalar core integration

#49 | 2021-10-21
US20210326176A1
Physics

Graphics systems and methods for accelerating synchronization using fine grain dependency check and scheduling optimizations based on available shared memory space

#50 | 2021-08-19
US20210255957A1
Physics

Data prefetching for graphics data processing

#51 | 2020-09-17
US20200294182A1
Physics

On chip dense memory for temporal buffering

#52 | 2020-09-17
US20200294179A1
Physics

Memory prefetching in multiple GPU environment

#53 | 2020-09-17
US20200294178A1
Physics

Systems and methods for exploiting queues and transitional storage for improved low-latency high-bandwidth on-die data retrieval

#54 | 2020-09-17
US20200293488A1
Physics

Scalar core integration

#55 | 2020-09-17
US20200293456A1
Physics

Preemptive page fault handling

#56 | 2020-09-17
US20200293450A1
Physics

Data prefetching for graphics data processing

#57 | 2020-09-17
US20200293369A1
Physics

Graphics systems and methods for accelerating synchronization using fine grain dependency check and scheduling optimizations based on available shared memory space

#58 | 2020-09-17
US20200293368A1
Physics

Systems and methods for synchronization of multi-thread lanes

#59 | 2020-09-17
US20200293367A1
Physics

Local memory sharing between kernels

InventorID:

2851807 ⎘