Tarek Ibrahim

DEEP CAVITY ARRANGEMENTS ON INTEGRATED CIRCUIT PACKAGING

DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY

ELECTRONIC SUBSTRATES HAVING EMBEDDED INDUCTORS

CO-PACKAGING OF PHOTONIC & ELECTRONIC INTEGRATED CIRCUIT DIE

MEMS DIES EMBEDDED IN GLASS CORES

PROTRUDING SN SUBSTRATE FEATURES FOR EPOXY FLOW CONTROL

METHODS AND APPARATUS FOR OPTICAL THERMAL TREATMENT IN SEMICONDUCTOR PACKAGES

METHODS AND APPARATUS TO PREVENT OVER-ETCH IN SEMICONDUCTOR PACKAGES

DIRECTLY COUPLED OPTICAL INTERPOSER

Inorganic-based embedded-die layers for modular semiconductive devices

LOCAL BRIDGE-LAST ARCHITECTURE FOR HETEROGENEOUS INTEGRATION APPLICATIONS

Through-substrate optical vias

Coreless electronic substrates having embedded inductors

Selectively roughened copper architectures for low insertion loss conductive features

Conductive route patterning for electronic substrates

Electronic substrates having embedded inductors

Inorganic-based embedded-die layers for modular semiconductive devices

IN-PLANE INDUCTORS IN IC PACKAGES

Corner guard for improved electroplated first level interconnect bump height range

Protruding SN substrate features for epoxy flow control

Sandwich-molded cores for high-inductance architectures

Inductors for package substrates

LITHOGRAPHICALLY DEFINED VERTICAL INTERCONNECT ACCESS (VIA) FOR A BRIDGE DIE FIRST LEVEL INTERCONNECT (FLI)

Inorganic-based embedded-die layers for modular semiconductive devices