Tempe, Arizona
United States
82
2025-11-13
The entities that hold a legal rights for patent applications filed by inventor Puffer David:
David Puffer from Tempe, US has applied for patents for these inventions. The list has both pending applications and granted patents:
ENGINE TO ENABLE HIGH SPEED CONTEXT SWITCHING VIA ON-DIE STORAGE
#2 | 2025-06-26SCALABLE I/O VIRTUALIZATION INTERRUPT AND SCHEDULING
#3 | 2025-06-26SCALABLE CENTRALIZED ERROR QUEUES IN A PROCESSING ARCHITECTURE
#4 | 2025-06-26ERROR INJECTION ARCHITECTURE IN A PROCESSING ENVIRONMENT
#5 | 2025-05-29GRAPHICS PROCESSOR DATA ACCESS AND SHARING
#6 | 2025-04-10MULTI-TILE MEMORY MANAGEMENT
#7 | 2025-03-20PAGE FAULTING AND SELECTIVE PREEMPTION
#8 | 2025-01-02MULTI-TILE MEMORY MANAGEMENT
#9 | 2024-12-31Multi-tile memory management
#10 | 2024-08-01Graphics processor data access and sharing
#11 | 2024-07-11SECTOR CACHE FOR COMPRESSION
#12 | 2024-03-21Scalable I/O virtualization interrupt and scheduling
#13 | 2024-01-04ENGINE TO ENABLE HIGH SPEED CONTEXT SWITCHING VIA ON-DIE STORAGE
#14 | 2024-01-04HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
#15 | 2023-09-28DISPLAY VIRTUALIZATION
#16 | 2023-09-28COMPRESSION USING A FLAT MAPPING IN VIRTUAL ADDRESS SPACE
#17 | 2023-09-21LOCAL MEMORY TRANSLATION TABLE ACCESSED AND DIRTY FLAGS
#18 | 2023-09-21LOCAL MEMORY TRANSLATION TABLE
#19 | 2023-09-21MULTI-RENDER PARTITIONING
#20 | 2023-09-21Scalable I/O virtualization interrupt and scheduling
#21 | 2023-09-21FLEXIBLE PARTITIONING OF GPU RESOURCES
#22 | 2023-09-21HARD PARTITIONING VIA INTRA-SOC COMPOSITION
#23 | 2023-08-17Sector cache for compression
#24 | 2023-02-09WORKLOAD SCHEDULING AND DISTRIBUTION ON A DISTRIBUTED GRAPHICS DEVICE
#25 | 2022-12-29DYNAMICALLY SCALABLE AND PARTITIONED COPY ENGINE
#26 | 2022-12-15Apparatus and method for scalable error detection and reporting
#27 | 2022-11-03Page faulting and selective preemption
#28 | 2022-10-20Apparatus and method for memory management in a graphics processing environment
#29 | 2022-09-01Page faulting and selective preemption
#30 | 2022-08-25SYSTEM, METHOD AND APPARATUS FOR PEER-TO-PEER COMMUNICATION
#31 | 2022-07-14SECURITY AND SUPPORT FOR TRUST DOMAIN OPERATION
#32 | 2022-07-14Device memory protection for supporting trust domains
#33 | 2022-06-30Engine to enable high speed context switching via on-die storage
#34 | 2022-06-30Hybrid low power homogenous grapics processing units
#35 | 2022-05-05GRAPHICS SECURITY WITH SYNERGISTIC ENCRYPTION, CONTENT-BASED AND RESOURCE MANAGEMENT TECHNOLOGY
#36 | 2022-05-05Assistance for hardware prefetch in cache access
#37 | 2022-04-21Multi-tile memory management
#38 | 2022-03-10Interconnected systems fence mechanism
#39 | 2021-12-02Sector cache for compression
#40 | 2021-11-11Hierarchical general register file (GRF) for execution block
#41 | 2021-09-16Control flow mechanism for execution of graphics processor instructions using active channel packing
#42 | 2021-09-02Coarse grain coherency
#43 | 2021-09-02Apparatus and method for scalable error detection and reporting
#44 | 2021-08-05Workload scheduling and distribution on a distributed graphics device
#45 | 2021-06-24Sector cache for compression
#46 | 2021-02-25Apparatus and method for memory management in a graphics processing environment
#47 | 2021-02-25Sector cache for compression
#48 | 2021-02-11Accelerator controller hub
#49 | 2021-02-04Page faulting and selective preemption
#50 | 2020-12-17Apparatus and method for display virtualization using mapping between virtual and physical display planes
#51 | 2020-10-29Coarse grain coherency
#52 | 2020-10-29Memory mapped virtual doorbell mechanism
#53 | 2020-10-22Engine to enable high speed context switching via on-die storage
#54 | 2020-08-13Thread prefetch mechanism
#55 | 2020-07-09Workload scheduling and distribution on a distributed graphics device
#56 | 2020-07-02Hybrid low power homogenous grapics processing units
#57 | 2020-06-11Sector cache for compression
#58 | 2020-05-28Apparatus and method for scalable error detection and reporting
#59 | 2020-01-23Hierarchical general register file (GRF) for execution block
#60 | 2019-12-26Apparatus and method for memory management in a graphics processing environment
#61 | 2019-10-03Coarse grain coherency
#62 | 2019-10-03System, apparatus and method for multi-die distributed memory mapped input/output support
#63 | 2019-07-25Method and apparatus for a scalable interrupt infrastructure
#64 | 2019-07-04Apparatus and method for display virtualization using mapping between virtual and physical display planes
#65 | 2019-06-27Page faulting and selective preemption
#66 | 2018-10-25Control flow mechanism for execution of graphics processor instructions using active channel packing
#67 | 2018-10-18Thread prefetch mechanism
#68 | 2018-10-11Coarse grain coherency
#69 | 2018-10-11Page faulting and selective preemption
#70 | 2018-10-11Apparatus and method for memory management in a graphics processing environment
#71 | 2018-10-04Engine to enable high speed context switching via on-die storage
#72 | 2018-10-04Sector cache for compression
#73 | 2018-10-04Hybrid low power homogenous grapics processing units
#74 | 2018-10-04Hierarchical general register file (GRF) for execution block
#75 | 2018-08-02Efficient fine grained processing of graphics workloads in a virtualized environment
#76 | 2018-03-29Cache and compression interoperability in a graphics processor pipeline
#77 | 2015-06-18Isochronous agent data pinning in a multi-level memory system
#78 | 2013-06-13Peripheral interface alert message for downstream device
#79 | 2012-12-27Processor core with higher performance burst operation with lower power dissipation sustained workload mode
#80 | 2011-09-15Peripheral interface alert message for downstream device
#81 | 2006-12-21Peripheral interface alert message for downstream device
#82 | 2006-10-10Memory transaction ordering
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