Melaka
Malaysia
38
2025-09-11
The entities that hold a legal rights for patent applications filed by inventor Lee Teck Sim:
Teck Sim Lee from Melaka, MY has applied for patents for these inventions. The list has both pending applications and granted patents:
SEMICONDUCTOR PACKAGE WITH HYBRID INTERCONNECT CLIP
#2 | 2025-09-11SEMICONDUCTOR PACKAGE WITH COMBINED LEAD FRAME AND CLIP FRAME
#3 | 2024-11-28PACKAGE WITH ELECTRICALLY INSULATED CARRIER AND AT LEAST ONE STEP ON ENCAPSULANT
#4 | 2024-10-17LEADFRAME COMPRISING A LEAD WITH AN ELEVATION FOR INCREASING MECHANICAL ROBUSTNESS AND A SEMICONDUCTOR PACKAGE
#5 | 2024-03-14POWER SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
#6 | 2024-02-01Package with electrically insulated carrier and at least one step on encapsulant
#7 | 2023-11-09SEMICONDUCTOR PACKAGE HAVING AN EMBEDDED ELECTRICAL CONDUCTOR CONNECTED BETWEEN PINS OF A SEMICONDUCTOR DIE AND A FURTHER DEVICE
#8 | 2022-05-19Package with electrically insulated carrier and at least one step on encapsulant
#9 | 2022-05-12Linear spacer for spacing a carrier of a package
#10 | 2022-04-07SEMICONDUCTOR PACKAGES INCLUDING A U-SHAPED RAIL
#11 | 2021-12-16Package and lead frame design for enhanced creepage and clearance
#12 | 2021-06-10Method for fabricating a semiconductor device by using different connection methods for the semiconductor die and the clip
#13 | 2021-06-03Semiconductor package with expanded heat spreader
#14 | 2021-03-11Multi-chip package
#15 | 2021-01-21Semiconductor package, semiconductor assembly and method for fabricating a semiconductor package
#16 | 2019-03-14SMD package with top side cooling
#17 | 2019-03-07Transistor package with three-terminal clip
#18 | 2018-11-29Semiconductor chip package having a cooling surface and method of manufacturing a semiconductor package
#19 | 2018-09-27Semiconductor package for multiphase circuitry device
#20 | 2018-07-26Semiconductor package with heat slug and rivet free die attach area
#21 | 2018-06-07Leadframe and method of manufacturing the same
#22 | 2018-03-01Semiconductor chip package having a repeating footprint pattern
#23 | 2017-06-22Semiconductor devices with improved thermal and electrical performance
#24 | 2017-05-25Semiconductor chip package comprising side wall marking
#25 | 2017-04-06Functionalized interface structure
#26 | 2016-12-15Electronic Devices with Increased Creepage Distances
#27 | 2016-08-11Semiconductor chip package having contact pins at short side edges
#28 | 2016-04-21Semiconductor component having inner and outer semiconductor component housings
#29 | 2016-02-25Leadframe and method of manufacturing the same
#30 | 2015-09-24Power semiconductor device
#31 | 2015-09-24High power electronic component with multiple leadframes
#32 | 2015-07-30Electronic device and method for fabricating an electronic device
#33 | 2015-05-14Method of electrically isolating shared leads of a lead frame strip
#34 | 2015-04-30Semiconductor device package
#35 | 2014-09-18Packaged device comprising non-integer lead pitches and method of manufacturing the same
#36 | 2014-07-31CHIP ARRANGEMENT AND CHIP PACKAGE
#37 | 2013-06-20Semiconductor Device and Fabrication Method
#38 | 2012-03-29Multi-chip semiconductor packages and assembly thereof
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