Dresden
Germany
12
2014-07-01
The entities that hold a legal rights for patent applications filed by inventor SELIGER Frank:
Frank SELIGER from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Methods of forming a semiconductor device while preventing or reducing loss of active area and/or isolation regions
#2 | 2013-06-20Enhancing integrity of a high-K gate stack by protecting a liner at the gate bottom during gate head exposure
#3 | 2012-08-02Sophisticated gate electrode structures formed by cap layer removal with reduced loss of embedded strain-inducing semiconductor material
#4 | 2011-06-02Cap removal in a high-k metal gate electrode structure by using a sacrificial fill material
#5 | 2011-05-05Corner rounding in a replacement gate approach based on a sacrificial fill material applied prior to work function metal deposition
#6 | 2011-03-31Stress engineering in a contact level of semiconductor devices by stressed conductive layers and an isolation spacer
#7 | 2011-03-31Forming semiconductor resistors in a semiconductor device comprising metal gates by increasing etch resistivity of the resistors
#8 | 2010-12-30Cap layer removal in a high-K metal gate stack by using an etch process
#9 | 2010-12-30Enhanced cap layer integrity in a high-K metal gate stack by using a hard mask for offset spacer patterning
#10 | 2010-11-18Multi-step deposition of a spacer material for reducing void formation in a dielectric material of a contact level of a semiconductor device
#11 | 2010-06-03Enhancing integrity of a high-k gate stack by protecting a liner at the gate bottom during gate head exposure
#12 | 2010-05-06Method and device for fabricating bonding wires on the basis of microelectronic manufacturing techniques
300102 ⎘