Travis T. Schluessler

PROCESSOR POWER MANAGEMENT

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING POWER AND PERFORMANCE BALANCING BETWEEN MULTIPLE PROCESSING ELEMENTS AND/OR A COMMUNICATION BUS

System and Method for High Performance Secure Access to a Trusted Platform Module on a Hardware Virtualization Platform

Processor power management

PER-LANE POWER MANAGEMENT OF BUS INTERCONNECTS

Motion biased foveated renderer

Low power foveated rendering to save power on GPU and/or display

Motion biased foveated renderer

Method, apparatus, and system for energy efficiency and energy conservation including power and performance balancing between multiple processing elements and/or a communication bus

Field recovery of graphics on-die memory

ADAPTIVE MULTI-RESOLUTION FOR GRAPHICS

Memory-based dependency tracking and cache pre-fetch hardware for multi-resolution shading

Power management of memory chips based on working set size

Graphics processor with tiled compute kernels

Compute optimization mechanism for deep neural networks

SPECIALIZED CODE PATHS IN GPU PROCESSING

Techniques for determining an adjustment for a visual output

Facilitating configuration of computing engines based on runtime workload measurements at computing devices

Method and device to augment volatile memory in a graphics subsystem with non-volatile memory

Power budgeting between a processing core, a graphics core, and a bus on an integrated circuit when a limit is reached

Method, apparatus, and system for energy efficiency and energy conservation including power and performance workload-based balancing between multiple processing elements