Inventor profile of:

David Wu

City:

Austin, Texas

Country:

United States

Published Applications:

19

Last publication date:

2012-03-22

Top Assignees for applications by David Wu

The entities that hold a legal rights for patent applications filed by inventor Wu David:

Recent patent applications by Wu David

David Wu from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2012-03-22
US20120070987A1
Electricity

Methods for fabricating a semiconductor device having decreased contact resistance

#2 | 2012-01-12
US20120007182A1
Electricity

Charging protection device

#3 | 2010-12-16
US20100314685A1
Electricity

Charging protection device

#4 | 2009-10-08
US20090253238A1
Electricity

Method of forming multiple fins for a semiconductor device

#5 | 2009-08-18
US11259572
-

System for characterization of low-k dielectric material damage

#6 | 2009-03-26
US20090081860A1
Electricity

Method of forming transistor devices with different threshold voltages using halo implant shadowing

#7 | 2009-03-26
US20090081837A1
Electricity

Method for fabricating a semiconductor device having an extended stress liner

#8 | 2009-03-26
US20090078998A1
Electricity

Semiconductor device having decreased contact resistance

#9 | 2009-03-26
US20090078991A1
Electricity

Stress enhanced semiconductor device and methods for fabricating same

#10 | 2009-01-27
US10740546
-

Method for reducing floating body effects in SOI semiconductor device without degrading mobility

#11 | 2008-12-18
US20080308879A1
Electricity

MOS structures with contact projections for lower contact resistance and methods for fabricating the same

#12 | 2008-12-11
US20080303089A1
Electricity

Integrated circuit system with triode

#13 | 2008-12-04
US20080296682A1
Electricity

MOS structures with remote contacts and methods for fabricating the same

#14 | 2007-09-18
US11327641
-

Test structure and method for measuring the resistance of line-end vias

#15 | 2007-08-07
US10889026
-

Selective P-channel Vadjustment in SiGe system for leakage optimization

#16 | 2007-02-13
US10790939
-

Bi-modal halo implantation

#17 | 2005-09-27
US10824428
-

Composite spacer liner for improved transistor performance

#18 | 2005-07-26
US10700557
-

Method for improving MOS mobility

#19 | 2005-03-08
US10085903
-

SOI MOSFET junction degradation using multiple buried amorphous layers

InventorID:

3069340 ⎘