Plano, Texas
United States
54
2013-02-26
The entities that hold a legal rights for patent applications filed by inventor Leipold Dirk:
Dirk Leipold from Plano, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Digital phase locked loop
#2 | 2012-11-06Fine-grained gear-shifting of a digital phase-locked loop (PLL)
#3 | 2012-10-09Radio frequency built-in self test for quality monitoring of local oscillator and transmitter
#4 | 2012-01-12Digital amplitude modulation
#5 | 2011-10-27All-digital frequency synthesis with DCO gain calculation
#6 | 2011-09-27Sampling mixer with asynchronous clock and signal domains
#7 | 2011-08-16All-digital frequency synthesis with DCO gain calculation
#8 | 2011-07-28Digital amplitude modulation
#9 | 2009-08-20Predistortion Calibration In A Transceiver Assembly
#10 | 2009-08-18Buried layer and method
#11 | 2009-08-06Direct Radio Frequency (RF) Sampling With Recursive Filtering Method
#12 | 2009-06-30Predistortion calibration in a transceiver assembly
#13 | 2009-04-14Direct radio frequency (RF) sampling with recursive filtering method
#14 | 2009-01-29System and method for amplifier gain measurement and compensation
#15 | 2009-01-27All-digital frequency synthesis with non-linear differential term for handling frequency perturbations
#16 | 2008-10-21Transmit filter
#17 | 2008-09-18RF A/D converter with phased feedback to low noise amplifier
#18 | 2008-07-03Time-to-digital converter with non-inverting buffers, transmission gates and non-linearity corrector, SOC including such converter and method of phase detection for use in synthesizing a clock signal
#19 | 2008-06-05System and method for increasing radio frequency (RF) microwave inductor-capacitor (LC) oscillator frequency tuning range
#20 | 2008-05-15Methods and apparatus to provide an auxiliary receive path to support transmitter functions
#21 | 2008-04-08Spread spectrum demodulation using a subsampling communication receiver architecture
#22 | 2008-02-21On-chip receiver sensitivity test mechanism
#23 | 2007-08-07On-chip receiver sensitivity test mechanism
#24 | 2007-06-07System and method for implementing transformer on package substrate
#25 | 2007-05-17Method of defining semiconductor fabrication process utilizing transistor inverter delay period
#26 | 2007-05-15Removing close-in interferers through a feedback loop
#27 | 2007-05-10Offset balancer, method of balancing an offset and a wireless receiver employing the balancer and the method
#28 | 2007-05-10Digital, down-converted RF residual leakage signal mitigating RF residual leakage
#29 | 2007-05-10Gain calibration of a digital controlled oscillator
#30 | 2006-12-28Type-II all-digital phase-locked loop (PLL)
#31 | 2006-12-05Type-II all-digital phase-locked loop (PLL)
#32 | 2006-07-27Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing
#33 | 2006-06-22Removing close-in interferers through a feedback loop
#34 | 2006-06-06Sigma-delta (ΣΔ) analog-to-digital converter (ADC) structure incorporating a direct sampling mixer
#35 | 2006-04-25On-chip test mechanism for transceiver power amplifier and oscillator frequency
#36 | 2006-02-28Efficient charge transfer using a switched capacitor resistor
#37 | 2006-02-21Subsampling communication receiver architecture with gain control and RSSI generation
#38 | 2006-02-16Gain calibration of a digital controlled oscillator
#39 | 2005-12-29Low noise high isolation transmit buffer gain control mechanism
#40 | 2005-12-08Method and apparatus for digital amplitude and phase modulation
#41 | 2005-12-01Efficient pulse amplitude modulation transmit modulation
#42 | 2005-11-08Subsampling communication receiver architecture with relaxed IFA readout timing
#43 | 2005-10-25Multi-tap, digital-pulse-driven mixer
#44 | 2005-10-20Image reject filtering in a direct sampling mixer
#45 | 2005-10-20Multi-band low noise amplifier system
#46 | 2005-09-29Wireless communications device having type-II all-digital phase-locked loop (PLL)
#47 | 2005-09-08Method and apparatus for crystal drift compensation
#48 | 2005-08-25Apparatus for and method of noise suppression and dithering to improve resolution quality in a digital RF processor
#49 | 2005-08-25System and method for increasing radio frequency (RF)/microwave inductor-capacitor (LC) oscillator frequency tuning range
#50 | 2005-08-02Efficient pulse amplitude modulation transmit modulation
#51 | 2005-06-16Sampling mixer with asynchronous clock and signal domains
#52 | 2005-05-19Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing
#53 | 2005-05-05Methods and apparatus to control frequency offsets in digitally controlled crystal oscillators
#54 | 2005-04-19Integrated circuit incorporating RF antenna switch and power amplifier
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