Charles Ray Johns

Configurable interface controller

Ceasing parallel processing of first set of loops upon selectable number of monitored terminations and processing second set

Controlling bandwidth reservations method and apparatus

Method and apparatus for generating gammacorrected antialiased lines

Tracing thermal data via performance monitoring

Methods and apparatus for supporting multiple configurations in a multi-processor system

System and method for tracking messages between a processing unit and an external device

Thermal interrupt generation

System and Method for Getllar Hit Cache Line Data Forward Via Data-Only Transfer Protocol Through BEB Bus

Support of deep power savings mode and partial good in a thermal management system

Directory for multi-node coherent bus

Directory for multi-node coherent bus

Tracing thermal data via performance monitoring

Multi-Chip Module With Third Dimension Interconnect

Maximal temperature logging

Maximal Temperature Logging

Generation of hardware thermal profiles for a set of processors

Alternative Key Pad Layout for Enhanced Security

Method and apparatus for power throttling a processor in an information handling system

Non-Homogeneous Multi-Processor System With Shared Memory

Method and apparatus for managing the power consumption of a data processing system

Methods and apparatus for reducing command processing latency while maintaining coherence

System and method for flexible multiple protocols

System and Method for Using a Plurality of Heterogeneous Processors in a Common Computer System

System and method for sharing memory by heterogeneous processors

Selection of processor cores for optimal thermal performance

OPTIMIZING THERMAL PERFORMANCE USING FEED-BACK DIRECTED OPTIMIZATION

Dynamically adapting software for reducing a thermal state of a processor core based on its thermal index

Optimizing thermal performance using thermal flow analysis

EFFICIENT TRIANGULAR SHAPED MESHES

Methods and apparatus for reducing command processing latency while maintaining coherence

System for asynchronous DMA command completion notification wherein the DMA command comprising a tag belongs to a plurality of tag groups

Dynamic system bus encryption using improved differential transitional encoding

Computer architecture and software cells for broadband networks

Computer architecture and software cells for broadband networks

Implementation of thermal throttling logic

Optimizing power and performance using software and hardware thermal profiles

Thermal throttle control with minimal impact to interrupt latency

Support of deep power savings mode and partial good in a thermal management system

Generation of software thermal profiles for applications in a simulated environment

Tracing thermal data via performance monitoring

Maximal temperature logging

Analytical generation of software thermal profiles

Generation of software thermal profiles executed on a set of processors using thermal sampling

Generation of software thermal profiles executed on a set of processors using processor activity

Generation of hardware thermal profiles for a set of processors

Hysteresis in thermal throttling

Thermal throttling control for testing of real-time software

Thermal interrupt generation

Efficient triangular shaped meshes

Alternative key pad layout for enhanced security

System and method asynchronous DMA command completion notification by accessing register via attached processing unit to determine progress of DMA command

Method and apparatus for implementing data mapping with shuffle algorithm

Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment

Method and apparatus for generating a mask value and command for extreme data rate memories utilizing error correction codes

Methods and apparatus for facilitating coherency management in distributed multi-processor system

Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment

Single port/multiple ring implementation of a hybrid crossbar partially non-blocking data switch

Microprocessor having bandwidth management for computing applications and related method of managing bandwidth allocation

Memory management for real-time applications

Temperature sensing circuits, and temperature detection circuits including same

Non-homogeneous multi-processor system with shared memory

System and method for flexible multiple protocols

Method and apparatus for on-chip dynamic temperature tracking

SIMD-RISC processor module

Methods and apparatus for list transfers using DMA transfers in a multi-processor system

Updating remote locked cache

Integrated circuit die including a temperature detection circuit, and system and methods for calibrating the temperature detection circuit

Methods and apparatus for supporting multiple configurations in a multi-processor system

Envelope packet architecture for broadband engine

Method and system for an improved differential form of transitional coding

Hierarchical management for multiprocessor system with real-time attributes

Hierarchical management for multiprocessor system

Memory barriers primitives in an asymmetric heterogeneous multiprocessor environment

Establishing command order in an out of order DMA command queue

Memory management in multiprocessor system

System and method for using a plurality of heterogeneous processors in a common computer system

System and method for identifying and accessing streaming data in a locked portion of a cache

Method and apparatus for directory-based coherence with distributed directory management

Method and apparatus for directory-based coherence with distributed directory management utilizing prefetch caches

Method to provide cache management commands for a DMA controller

Implementation of an LRU and MRU algorithm in a partitioned cache

Method for supporting improved burst transfers on a coherent bus

Method and apparatus for preloading translation buffers

Method of resource allocation using an access control mechanism

Multi-chip module with third dimension interconnect

Method of resource arbitration

Distributed control load shaping method and apparatus

Controlling bandwidth reservations method and apparatus

System and method for sharing memory by heterogeneous processors

System and method for a configurable interface controller

Method and apparatus for coherent memory structure of heterogeneous processor systems

Software-controlled cache set management with software-generated class identifiers

Proxy direct memory access

Method and apparatus for managing the power consumption of a data processing system

Security architecture for system on chip