Boulder, Colorado
United States
65
2018-10-02
The entities that hold a legal rights for patent applications filed by inventor Milne Roger B.:
Roger B. Milne from Boulder, US has applied for patents for these inventions. The list has both pending applications and granted patents:
User-controlled movement of graphical objects
#2 | 2015-12-08Non-language-based object search
#3 | 2015-02-03Mechanism for displaying visual clues to stacking order during a drag and drop operation
#4 | 2014-07-08System and method for intuitive manipulation of the layering order of graphics objects
#5 | 2014-07-01System and method for distributing and accessing files in a distributed storage system
#6 | 2014-03-18Efficiently detecting graphics objects near a selected point
#7 | 2013-07-16Drawing figures in computer-based drawing applications
#8 | 2013-06-25System-level hardware and software development and co-simulation system
#9 | 2013-04-23Drawing figures in computer-based drawing applications
#10 | 2013-03-05System and method for distributing and accessing files in a distributed storage system
#11 | 2012-10-16System and method for distributing and accessing files in a distributed storage system
#12 | 2012-06-26Method of abstracting a graphical object in a line art style suitable for printing and artwork-coloring
#13 | 2012-06-21Mosaic generation from user-created content
#14 | 2012-03-29Method and apparatus of graphical object selection in a web browser
#15 | 2012-01-03Method and apparatus of graphical object selection in a web browser
#16 | 2011-03-22Method and apparatus of graphical object selection
#17 | 2011-02-22Using XTables to communicate in a high level modeling system
#18 | 2011-02-22Translation of a program in a dynamically-typed language to a program in a hardware description language
#19 | 2011-01-11Efficient communication of data between blocks in a high level modeling system
#20 | 2010-09-14Using scripts for netlisting in a high-level modeling system
#21 | 2010-06-15Fast hardware co-simulation reset using partial bitstreams
#22 | 2010-05-25Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description
#23 | 2010-04-27Command buffering for hardware co-simulation
#24 | 2010-03-23Translation of high-level circuit design blocks into hardware description language
#25 | 2010-03-23Determination of data rate and data type in a high-level electronic design
#26 | 2010-02-23Hardware and software implementation of an electronic design in a programmable logic device
#27 | 2010-02-23Compile-time dispatch of operations on type-safe heterogeneous containers
#28 | 2009-12-22Point-to-point ethernet hardware co-simulation interface
#29 | 2009-12-01Embedding an interpreter within an application written in a different programming language
#30 | 2009-11-17Method and system for parameterization of imperative-language functions intended as hardware generators
#31 | 2009-06-09Shared memory interface in a programmable logic device using partial reconfiguration
#32 | 2009-05-26Method and apparatus for interfacing instruction processors and logic in an electronic circuit modeling system
#33 | 2009-05-19Component naming
#34 | 2009-03-31Programmatically specifying the state of graphical user interface (GUI) controls
#35 | 2009-02-17Correlation of data from design analysis tools with design blocks in a high-level modeling system
#36 | 2009-01-13Clock stabilization detection for hardware simulation
#37 | 2008-10-28Transformation of graphs representing an electronic design in a high modeling system
#38 | 2008-10-14Hardware-based co-simulation on a PLD having an embedded processor
#39 | 2008-10-07Embedding a co-simulated hardware object in an event-driven simulator
#40 | 2008-07-01Method and apparatus for translating an imperative programming language description of a circuit into a hardware description
#41 | 2008-06-10Translation of high-level circuit design blocks into hardware description language
#42 | 2008-06-03Wireless dynamic boundary-scan topologies for field
#43 | 2008-05-20Vector transfer during co-simulation
#44 | 2008-04-29Efficient communication of data between blocks in a high level modeling system
#45 | 2008-04-29Co-simulation interface
#46 | 2008-04-22Method of simulating bidirectional signals in a modeling system
#47 | 2008-03-18Shared memory for co-simulation
#48 | 2008-03-18Hardware co-simulation breakpoints in a high-level modeling system
#49 | 2008-03-11Vector interface to shared memory in simulating a circuit design
#50 | 2008-02-05Relocating blocks for netlist generation of an electronic system
#51 | 2007-10-23Communication between clock domains of an electronic circuit
#52 | 2007-10-16Embedding a hardware object in an application system
#53 | 2007-09-11Method of and apparatus for specifying clock domains in electronic circuit designs
#54 | 2007-04-17Translation of an electronic integrated circuit design into hardware
#55 | 2007-04-10HDL co-simulation in a high-level modeling system
#56 | 2007-03-20Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions
#57 | 2006-11-28Design partitioning for co-stimulation
#58 | 2006-08-01Incremental netlisting
#59 | 2006-07-25Compilation in a high-level modeling system
#60 | 2006-06-27Integrated circuit with overclocked dedicated logic circuitry
#61 | 2006-03-07Configurable address generator and circuit using same
#62 | 2006-02-28Translation of an electronic integrated circuit design into hardware description language using circuit description template
#63 | 2006-02-21Specification of the hierarchy, connectivity, and graphical representation of a circuit design
#64 | 2005-06-28Integrated circuit with overclocked dedicated logic circuitry
#65 | 2005-06-14Method and apparatus for providing an interface to an electronic design of an integrated circuit
3133693 ⎘