Mack Wayne Riley

Evaluation of multiple input signature register results

Structure For An Integrated Circuit That Employs Multiple Interfaces

Maintaining Circuit Delay Characteristics During Power Management Mode

Dynamic frequency scaling sequence for multi-gigahertz microprocessors

Method to Bridge a Distance Between eFuse Banks That Contain Encoded Data

Circuit to reduce transient current swings during mode transitions of high frequency/high power chips

METHOD AND APPARATUS FOR INTERFACING TO AN INTEGRATED CIRCUIT THAT EMPLOYS MULTIPLE INTERFACES

Circuit to reduce power supply fluctuations in high frequency/high power circuits

Using a single bank of efuses to successively store testing data from multiple stages of testing

System and method for advanced logic built-in self test with selection of scan channels

Systems and methods for LBIST testing using commonly controlled LBIST satellites

Systems and methods for LBIST testing using isolatable scan chains

Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer

Method and apparatus for detecting frequency lock in a system including a frequency synthesizer

Apparatus and method for using a single bank of eFuses to successively store testing data from multiple stages of testing

Deep power saving by disabling clock distribution without separate clock distribution for power management logic

Method to gate off PLLS in a deep power saving state without separate clock distribution for power management logic

Method to reduce transient current swings during mode transitions of high frequency/high power chips

Store scan data in trace arrays for on-board software access

Circuit to reduce power supply fluctuations in high frequency/ high power circuits

Dynamic frequency scaling sequence for multi-gigahertz microprocessors