Weize Xiong

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

Novel Method to Improve Performance by Enhancing Poly Gate Doping Concentration in an Embedded SiGe PMOS Process

Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels

Memory device with memory cell including MuGFET and FIN capacitor

Method to eliminate re-crystallization border defects generated during solid phase epitaxy of a DSB substrate

Memory device with memory cell including MuGFET and fin capacitor

Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate

VARYING MUGFET WIDTH TO ADJUST DEVICE CHARACTERISTICS

INTEGRATING STRAIN ENGINEERING TO MAXIMIZE SYSTEM-ON-A-CHIP PERFORMANCE

Dual metal gates for mugfet device

Multiple-gate MOSFET device and associated manufacturing methods

Metal oxide semiconductor (MOS) device having both an accumulation and a enhancement mode transistor device on a similar substrate and a method of manufacture therefor

Short channel semiconductor device fabrication

Gate electrode for FinFET device

System and method for integrating low schottky barrier metal source/drain