Inventor profile of:

Fredrick Jenne

City:

Sunnyvale, California

Country:

United States

Published Applications:

16

Last publication date:

2016-10-20

Top Assignees for applications by Fredrick Jenne

The entities that hold a legal rights for patent applications filed by inventor Jenne Fredrick:

Recent patent applications by Jenne Fredrick

Fredrick Jenne from Sunnyvale, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2016-10-20
US20160308033A1
Electricity

Oxide-nitride-oxide stack having multiple oxynitride layers

#2 | 2016-10-20
US20160308009A1
Electricity

Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region

#3 | 2014-04-29
US13551237
-

SONOS stack with split nitride memory layer

#4 | 2013-11-21
US20130307052A1
Electricity

SONOS ONO stack scaling

#5 | 2013-11-21
US20130306975A1
Electricity

Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region

#6 | 2013-07-11
US20130178031A1
Electricity

Integration of non-volatile charge trap memory devices and logic CMOS devices

#7 | 2013-07-11
US20130178030A1
Performing operations; transporting

Method of ONO integration into logic CMOS flow

#8 | 2013-07-11
US20130175600A1
Electricity

SONOS stack with split nitride memory layer

#9 | 2013-07-11
US20130175504A1
Electricity

Oxide-nitride-oxide stack having multiple oxynitride layers

#10 | 2012-07-26
US20120188826A1
Physics

Memory architecture having two independently controlled voltage pumps

#11 | 2011-06-28
US12343617
-

Memory architecture having a reference current generator that provides two reference currents

#12 | 2010-03-25
US20100074028A1
Physics

Memory architecture having two independently controlled voltage pumps

#13 | 2009-07-16
US20090179253A1
Electricity

Oxide-nitride-oxide stack having multiple oxynitride layers

#14 | 2009-03-26
US20090080260A1
Physics

Programmable CSONOS logic element

#15 | 2008-12-04
US20080298132A1
Physics

Sense transistor protection for memory programming

#16 | 2008-11-27
US20080290386A1
Electricity

Floating gate memory device with increased coupling coefficient

InventorID:

331177 ⎘