AUSTIN, Texas
United States
28
2017-01-26
The entities that hold a legal rights for patent applications filed by inventor Sprangle Eric:
Eric Sprangle from AUSTIN, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Distribution of tasks among asymmetric processing elements
#2 | 2016-12-22Distribution of tasks among asymmetric processing elements
#3 | 2016-12-22Distribution of tasks among asymmetric processing elements
#4 | 2015-03-12System and method for using a mask register to track progress of gathering and scattering elements between data registers and memory
#5 | 2015-01-08Distribution of tasks among asymmetric processing elements
#6 | 2015-01-08Distribution of tasks among asymmetric processing elements
#7 | 2015-01-08Distribution of tasks among asymmetric processing elements
#8 | 2014-10-02Partition-free multi-socket memory system architecture
#9 | 2014-05-29Performing a multiply-multiply-accumulate instruction
#10 | 2014-05-29Providing extended cache replacement state information
#11 | 2014-03-20Sharing resources between a CPU and GPU
#12 | 2014-02-20Super multiply add (super MADD) instructions with three scalar terms
#13 | 2014-01-16METHODS, APPARATUS, AND INSTRUCTIONS FOR CONVERTING VECTOR DATA
#14 | 2013-09-19Partition-free multi-socket memory system architecture
#15 | 2013-09-05Methods, apparatus, and instructions for converting vector data
#16 | 2013-07-11Performing a multiply-multiply-accumulate instruction
#17 | 2011-10-27Processor and system using a mask register to track progress of gathering and prefetching elements from memory
#18 | 2011-06-30Sharing resources between a CPU and GPU
#19 | 2011-04-28Mechanism for effectively caching streaming and non-streaming data patterns
#20 | 2010-12-30Adaptively handling remote atomic execution based upon contention prediction
#21 | 2010-01-07Distribution of tasks among asymmetric processing elements
#22 | 2009-10-01Partition-free multi-socket memory system architecture
#23 | 2009-09-03Migrating execution of thread between cores of different instruction set architecture in multi-core processor and transitioning each core to respective on / off power state
#24 | 2009-07-09Mechanism for effectively handling texture sampling
#25 | 2009-07-02System and method for using a mask register to track progress of gathering elements from memory
#26 | 2009-07-02Methods, apparatus, and instructions for converting vector data
#27 | 2009-07-02Mechanism for effectively caching streaming and non-streaming data patterns
#28 | 2009-07-02Device, system, and method for improving processing efficiency by collectively applying operations
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