Inventor profile of:

Robert E. Ober

City:

San Jose, California

Country:

United States

Published Applications:

19

Last publication date:

2011-09-22

Top Assignees for applications by Robert E. Ober

The entities that hold a legal rights for patent applications filed by inventor Ober Robert E.:

Recent patent applications by Ober Robert E.

Robert E. Ober from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2011-09-22
US20110231615A1
Physics

Method and system for maintaining data coherency across a network

#2 | 2011-09-22
US20110231613A1
Physics

Method and system for local caching of remote storage data

#3 | 2011-03-10
US20110060865A1
Physics

Systems and Methods for Flash Memory Utilization

#4 | 2010-12-02
US20100306452A1
Physics

Multi-mapped flash RAID

#5 | 2010-06-24
US20100161929A1
Physics

Flexible Memory Appliance and Methods for Using Such

#6 | 2010-06-24
US20100161909A1
Physics

Systems and Methods for Quota Management in a Memory Appliance

#7 | 2010-06-24
US20100161908A1
Physics

Efficient Memory Allocation Across Multiple Accessing Systems

#8 | 2010-06-24
US20100161879A1
Physics

Efficient and Secure Main Memory Sharing Across Multiple Processors

#9 | 2006-12-12
US10444918
-

Configurable real-time trace port for embedded processors

#10 | 2006-11-16
US20060259742A1
Physics

Controlling out of order execution pipelines using pipeline skew parameters

#11 | 2006-06-13
US10431996
-

Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking events

#12 | 2005-09-08
US20050198475A1
Physics

Thread selection unit and method to fairly allocate processor cycles in a block multithreaded processor

#13 | 2005-08-11
US20050177819A1
Physics

Program tracing in a multithreaded processor

#14 | 2005-08-11
US20050177703A1
Physics

Thread ID in a multithreaded processor

#15 | 2005-08-11
US20050177674A1
Physics

Configurable embedded processor

#16 | 2005-07-07
US20050149699A1
Physics

Variable length instruction pipeline

#17 | 2005-05-19
US20050108711A1
Physics

Machine instruction for enhanced control of multiple virtual processor systems

#18 | 2005-05-12
US20050102458A1
Physics

Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation

#19 | 2005-02-22
US9878145
-

Variable length instruction pipeline

InventorID:

3443831 ⎘