Geert Van Der Plas

FERROELECTRIC MEMORY DEVICE AND METHOD OF NON-DESTRUCTIVELY READING SAME

MICRO-ELECTRONIC COMPONENT COMBINING POWER DELIVERY AND COOLING FROM THE BACK SIDE

SEMICONDUCTOR COMPONENT INCLUDING BACK SIDE INPUT/OUTPUT SIGNAL ROUTING

Semiconductor Structure with an Epitaxial Layer Stack for Fabricating Back-side Contacts

Method of producing a gate cut in a semiconductor component

Integrated circuit with 3D partitioning

ELECTRODE ARRANGEMENT, A NEURAL PROBE, AND A METHOD FOR MANUFACTURING AN ELECTRODE ARRANGEMENT

Method for inducing stress in semiconductor devices

Bipolar selector device for a memory array

Integrated circuit with backside power delivery network and backside transistor

Vertical isolated gate field effect transistor integrated in a semiconductor chip

Method for bonding and interconnecting semiconductor chips

Semiconductor fin structures having silicided portions

Method for producing a through semiconductor via connection

Semiconductor integrated circuit manufactured using a plasma-processing step

Assembly of integrated circuit modules and method for identifying the modules

Stress sensor for semiconductor components

Method of forming a junction field effect transistor

Method and system for measuring capacitance difference between capacitive elements

Micro-mirror arrays

Calibration of micro-mirror arrays

Oven Controlled MEMS Oscillator Device

Holographic visualization system comprising a high data refresh rate DND driver array

CAPACITANCE MEASUREMENT IN MICROCHIPS

Method and device for testing TSVS in a 3D chip stack

Comparator based asynchronous binary search A/D converter

Sigma-delta-based analog-to-digital converter

A/D converter comprising a voltage comparator device

A/D converter comprising a voltage comparator device