Raymond A. Bertram

System and method of using common adder circuitry for both a horizontal minimum instruction and a sum of absolute differences instruction

System and method for determination of a horizontal minimum of digital values

Microprocessor with selective substrate biasing for clock-gated functional blocks

Microprocessor with substrate bias clamps

Data bus inversion detection mechanism

Accelerated P-channel dynamic register

Accelerated N-channel dynamic register

P-domino register with accelerated non-charge path

N-domino register with accelerated non-discharge path

Non-inverting domino register

Inverting dynamic register with data-dependent hold time reduction mechanism

N-domino output latch with accelerated evaluate path

P-domino output latch

P-domino register

N-domino output latch

P-domino output latch with accelerated evaluate path

Non-inverting domino register

Dynamic multi-input priority multiplexer