Inventor profile of:

Michael Roesner

City:

Villach

Country:

Austria

Published Applications:

31

Last publication date:

2025-05-15

Top Assignees for applications by Michael Roesner

The entities that hold a legal rights for patent applications filed by inventor Roesner Michael:

Recent patent applications by Roesner Michael

Michael Roesner from Villach, AT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-05-15
US20250157857A1
Electricity

COMPONENT AND METHOD OF MANUFACTURING A COMPONENT USING AN ULTRATHIN CARRIER

#2 | 2023-10-05
US20230317666A1
Electricity

SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER

#3 | 2022-08-04
US20220246475A1
Electricity

Component and Method of Manufacturing a Component Using an Ultrathin Carrier

#4 | 2019-12-19
US20190385842A1
Electricity

Methods of forming a silicon-insulator layer and semiconductor device having the same

#5 | 2019-11-21
US20190355691A1
Electricity

Semiconductor devices including a metal silicide layer and methods for manufacturing thereof

#6 | 2019-10-10
US20190308274A1
Performing operations; transporting

Method of processing a silicon carbide containing crystalline substrate, silicon carbide chip, and processing chamber

#7 | 2019-09-26
US20190295981A1
Electricity

Silicon carbide devices and methods for manufacturing the same

#8 | 2019-05-16
US20190148233A1
Electricity

Component and method of manufacturing a component using an ultrathin carrier

#9 | 2019-03-28
US20190096780A1
Electricity

Magnetic phase change material for heat dissipation

#10 | 2018-11-01
US20180315713A1
Electricity

Integrated circuit substrate and method for manufacturing the same

#11 | 2018-01-04
US20180005838A1
Electricity

Segmented edge protection shield

#12 | 2017-12-14
US20170358494A1
Electricity

Plasma dicing of silicon carbide

#13 | 2017-07-20
US20170207123A1
Electricity

Method of processing a porous conductive structure in connection to an electronic component on a substrate

#14 | 2017-06-08
US20170158493A1
Performing operations; transporting

Method for simultaneous structuring and chip singulation

#15 | 2017-03-16
US20170076970A1
Electricity

Methods for processing a semiconductor workpiece

#16 | 2016-12-29
US20160379884A1
Electricity

Method of dicing a wafer

#17 | 2016-11-24
US20160343574A1
Electricity

Segmented edge protection shield

#18 | 2016-11-15
US14858633
Electricity

Semiconductor chip with structured sidewalls

#19 | 2016-11-03
US20160322306A1
Electricity

Integrated circuit substrate and method for manufacturing the same

#20 | 2016-09-08
US20160260658A1
Electricity

Source down semiconductor devices and methods of formation thereof

#21 | 2016-07-14
US20160204017A1
Electricity

Embrittlement device, pick-up system and method of picking up chips

#22 | 2016-05-19
US20160141208A1
Electricity

Method for processing a semiconductor substrate and a method for processing a semiconductor wafer

#23 | 2016-02-04
US20160035654A1
Electricity

Source down semiconductor devices and methods of formation thereof

#24 | 2016-02-04
US20160035560A1
Electricity

Carrier system for processing semiconductor substrates, and methods thereof

#25 | 2015-10-01
US20150279740A1
Electricity

Kerf preparation for backside metallization

#26 | 2015-08-06
US20150217997A1
Performing operations; transporting

Method for simultaneous structuring and chip singulation

#27 | 2015-07-23
US20150206802A1
Electricity

Singulation of semiconductor dies with contact metallization by electrical discharge machining

#28 | 2015-05-28
US20150147850A1
Electricity

METHODS FOR PROCESSING A SEMICONDUCTOR WORKPIECE

#29 | 2015-03-05
US20150064877A1
Electricity

Methods for processing a semiconductor wafer

#30 | 2014-01-09
US20140008805A1
Electricity

Component and method of manufacturing a component using an ultrathin carrier

#31 | 2013-07-25
US20130189830A1
Electricity

Methods of forming semiconductor devices

InventorID:

354815 ⎘