Cupertino, California
United States
16
2011-07-07
The entities that hold a legal rights for patent applications filed by inventor Cadouri Eitan:
Eitan Cadouri from Cupertino, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Method and mechanism for extraction and recognition of polygons in an IC design
#2 | 2011-03-22Method and mechanism for performing partitioning of DRC operations
#3 | 2011-03-08Method and system for implementing parallel processing of electronic design automation tools
#4 | 2010-02-02Method and system for parallel processing of IC design layouts
#5 | 2009-11-10Method and mechanism for performing latch-up check on an IC design
#6 | 2008-10-21Mapping yield information of semiconductor dice
#7 | 2008-08-26Method and mechanism for performing DRC processing with reduced passes through an IC design
#8 | 2008-02-19Optimization of die placement on wafers
#9 | 2007-12-13Method and mechanism for extraction and recognition of polygons in an IC design
#10 | 2007-05-22Selecting dice to test using a yield map
#11 | 2007-05-10Adjusting die placement on a semiconductor wafer to increase yield
#12 | 2007-03-13Selecting die placement on a semiconductor wafer to reduce test time
#13 | 2007-01-30Adjusting die placement on a semiconductor wafer to increase yield
#14 | 2006-12-14Method and system for using pattern matching to process an integrated circuit design
#15 | 2006-12-14Semiconductor wafer with non-rectangular shaped dice
#16 | 2006-05-02Transforming yield information of a semiconductor fabrication process
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