Frank Koschinsky

Method including a formation of a diffusion barrier and semiconductor structure including a diffusion barrier

Methods for fabricating integrated circuits including barrier layers for interconnect structures

Method for detecting defects in a diffusion barrier layer

Method including an etching of a portion of an interlayer dielectric in a semiconductor structure, a degas process and a preclean process

METHODS OF FORMING BARRIER LAYERS FOR CONDUCTIVE COPPER STRUCTURES

PROCESSES FOR FORMING INTEGRATED CIRCUITS WITH POST-PATTERNING TREAMENT

Methods of forming metal nitride materials

Multi-step deposition control

Test system and method of reducing damage in seed layers in metallization systems of semiconductor devices

Reduced wafer warpage in semiconductors by stress engineering in the metallization system

Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition

Multi-step deposition control

Method of testing an integrity of a material layer in a semiconductor structure

Method for removing a passivation layer prior to depositing a barrier layer in a copper metallization layer

SEMICONDUCTOR DEVICE COMPRISING COPPER-BASED CONTACT PLUG AND A METHOD OF FORMING THE SAME

TECHNIQUE FOR FORMING A COPPER-BASED METALLIZATION LAYER INCLUDING A CONDUCTIVE CAPPING LAYER

Method of forming electrically conductive lines in an integrated circuit

Technique for forming copper-containing lines embedded in a low-k dielectric by providing a stiffening layer

Void formation monitoring in a damascene process

Method for cleaning the surface of a substrate