Belmont, California
United States
45
2015-01-22
The entities that hold a legal rights for patent applications filed by inventor Kaptanoglu Sinan:
Sinan Kaptanoglu from Belmont, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Apparatus and methods for time-multiplex field-programmable gate arrays
#2 | 2013-11-26Omnibus logic element for packing or fracturing
#3 | 2013-09-24Apparatus and methods for time-multiplex field-programmable gate arrays
#4 | 2013-08-15Apparatus and methods for time-multiplex field-programmable gate arrays
#5 | 2012-08-07Omnibus logic element for packing or fracturing
#6 | 2012-07-17Apparatus and methods for time-multiplex field-programmable gate arrays with multiple clocks
#7 | 2012-07-10Fracturable lookup table and logic element
#8 | 2011-04-12Clustered field programmable gate array architecture
#9 | 2011-04-12Field programmable gate array architecture having Clos network-based input interconnect
#10 | 2011-03-22Omnibus logic element for packing or fracturing
#11 | 2010-09-21Fracturable lookup table and logic element
#12 | 2010-06-24(N+1) input flip-flop packing with logic in FPGA architectures
#13 | 2010-04-20(N+1) input flip-flop packing with logic in FPGA architectures
#14 | 2010-03-02Omnibus logic element
#15 | 2009-06-09FPGA architecture having two-level cluster input interconnect scheme without bandwidth limitation
#16 | 2009-05-26Omnibus logic element
#17 | 2008-10-23Block symmetrization in a field programmable gate array
#18 | 2008-08-28Dedicated interface architecture for a hybrid integrated circuit
#19 | 2008-08-05FPGA architecture having two-level cluster input interconnect scheme without bandwidth limitation
#20 | 2008-06-17Dedicated interface architecture for a hybrid integrated circuit
#21 | 2008-06-12Dedicated crossbar and barrel shifter block on programmable logic resources
#22 | 2008-06-12Block level routing architecture in a field programmable gate array
#23 | 2008-05-06Organizations of logic modules in programmable logic devices
#24 | 2008-04-08Dedicated crossbar and barrel shifter block on programmable logic resources
#25 | 2007-12-13Architecture for routing resources in a field programmable gate array
#26 | 2007-12-11Method and apparatus for performing mapping onto field programmable gate arrays utilizing fracturable logic cells
#27 | 2007-09-27Fracturable lookup table and logic element
#28 | 2007-09-13Block symmetrization in a field programmable gate array
#29 | 2007-06-19Block symmetrization in a field programmable gate array
#30 | 2007-03-22Area efficient fractureable logic elements
#31 | 2007-02-27Arithmetic structures for programmable logic devices
#32 | 2007-02-13Organizations of logic modules in programmable logic devices
#33 | 2007-01-23Omnibus logic element including look up table based logic elements
#34 | 2006-10-10Logic cell with improved multiplexer, barrel shifter, and crossbarring efficiency
#35 | 2006-05-09Dedicated crossbar and barrel shifter block on programmable logic resources
#36 | 2006-04-18Fracturable incomplete look up table area efficient logic elements
#37 | 2006-01-26Fracturable lookup table and logic element
#38 | 2005-12-08Architecture for routing resources in a field programmable gate array
#39 | 2005-09-13Fracturable lookup table and logic element
#40 | 2005-08-25Block level routing architecture in a field programmable gate array
#41 | 2005-08-23Turn architecture for routing resources in a field programmable gate array
#42 | 2005-05-24Block level routing architecture in a field programmable gate array
#43 | 2005-05-03Fracturable incomplete look up table for area efficient logic elements
#44 | 2005-03-01Block symmetrization in a field programmable gate array
#45 | 2005-01-04Block connector splitting in logic block of a field programmable gate array
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